PIC18F242-E/SP Microchip Technology, PIC18F242-E/SP Datasheet - Page 232
PIC18F242-E/SP
Manufacturer Part Number
PIC18F242-E/SP
Description
IC MCU CMOS 40MHZ 8K FLASH 28DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
Specifications of PIC18F242-E/SP
Core Size
8-Bit
Program Memory Size
16KB (8K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Controller Family/series
PIC18
No. Of I/o's
23
Eeprom Memory Size
256Byte
Ram Memory Size
768Byte
Cpu Speed
40MHz
No. Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP280 - DEVICE ADAPTER 18F2220 PDIP 28LD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F242-E/SP
Manufacturer:
Microchip Technology
Quantity:
135
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- Current page: 232 of 332
- Download datasheet (6Mb)
PIC18FXX2
DAW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example1:
Example 2:
DS39564C-page 230
Q Cycle Activity:
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
W
C
DC
W
C
DC
W
C
DC
W
C
DC
Q1
=
=
=
=
=
=
=
=
=
=
=
=
register W
Decimal Adjust W Register
[ label ] DAW
None
If [W<3:0> >9] or [DC = 1] then
(W<3:0>) + 6
else
(
If [W<7:4> >9] or [C = 1] then
(
else
(W<7:4>)
C
DAW adjusts the eight-bit value in
W, resulting from the earlier addi-
tion of two variables (each in
packed BCD format) and produces
a correct packed BCD result.
1
1
DAW
W<3:0>)
W<7:4>) + 6
Read
0000
Q2
0xA5
0
0
0x05
1
0
0xCE
0
0
0x34
1
0
0000
Process
W<7:4>;
W<3:0>;
Data
Q3
W<3:0>;
W<7:4>;
0000
Write
Q4
W
0111
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
CNT
Z
Q1
=
=
=
=
register 'f'
Decrement f
[ label ] DECF f [,d [,a]
0
d
a
(f) – 1
C, DC, N, OV, Z
Decrement register 'f'. If 'd' is 0, the
result is stored in W. If 'd' is 1, the
result is stored back in register 'f'
(default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ = 1, then the
bank will be selected as per the
BSR value (default).
1
1
DECF
Read
0000
Q2
0x01
0
0x00
1
f
[0,1]
[0,1]
© 2006 Microchip Technology Inc.
255
dest
CNT,
01da
Process
Data
Q3
1, 0
ffff
destination
Write to
Q4
ffff
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