ATMEGA32U4-AU Atmel, ATMEGA32U4-AU Datasheet - Page 157

MCU AVR 32K FLASH 16MHZ 44-TQFP

ATMEGA32U4-AU

Manufacturer Part Number
ATMEGA32U4-AU
Description
MCU AVR 32K FLASH 16MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA32U4-AU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2.5 KB
Interface Type
SPI/TWI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
26
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
16MHz
Total Internal Ram Size
2.5KB
# I/os (max)
26
Number Of Timers - General Purpose
5
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
26
Eeprom Memory Size
1KB
Ram Memory Size
2.5KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA32U4-16AU
ATMEGA32U4-16AU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
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ATMEGA32U4-AU
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Manufacturer:
Atmel
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15.10 Fault Protection Unit
7766F–AVR–11/10
Figure 15-18. Timer/Counter Timing Diagram, Setting of OCF1x, with Prescaler (f
Figure 15-19. Timer/Counter Timing Diagram, with Prescaler (f
The Timer/Counter4 incorporates a Fault Protection unit that can disable the PWM output pins, if
an external event is triggered. The external signal indicating an event can be applied via the
external interrupt INT0 pin or alternatively, via the analog-comparator unit. The Fault Protection
unit is illustrated by the block diagram shown in
that are not directly a part of the Fault Protection unit are gray shaded.
Figure 15-20. Fault Protection Unit Block Diagram
When the Fault Protection mode is enabled by the Fault Protection Enable (FPEN4) bit and a
change of the logic level (an event) occurs on the external interrupt pin (INT0), alternatively on
the Analog Comparator output (ACO), and this change confirms to the setting of the edge detec-
tor, a Fault Protection mode will be triggered. When a Fault Protection is triggered, the COM4x
bits are cleared, Output Comparators are disconnected from the PWM output pins and the
PORTB register bits are connected on the PWM output pins. The Fault Protection Enable
(FPEN4) is automatically cleared at the same system clock as the COM4nx bits are cleared. If
the Fault Protection Interrupt Enable bit (FPIE4) is set, a Fault Protection interrupt is generated
and the FPEN4 bit is cleared. Alternatively the FPEN4 bit can be polled by software to figure out
when the Timer/Counter has entered to Fault Protection mode.
TCNTn
TCNTn
(clk
(clk
TOVn
OCRnx
OCFnx
clk
clk
clk
clk
INT0
PCK
PCK
PCK
Tn
PCK
Tn
/8)
/8)
Comparator
Analog
BOTTOM + 1
ACO*
OCRnx - 1
FPAC4
BOTTOM + 1
Canceler
Noise
OCRnx
FPNC4
OCRnx Value
Figure
FPES4
15-20. The elements of the block diagram
Detector
Edge
OCRnx + 1
BOTTOM
FPEN4
clkT4
ATmega16/32U4
/8)
FAULT_PROTECTION (Int. Req.)
BOTTOM + 1
OCRnx + 2
Timer/Counter4
clkT4
/8)
157

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