PIC18F252-E/SO Microchip Technology, PIC18F252-E/SO Datasheet - Page 2
![IC MCU CMOS 40MHZ 16K FLSH28SOIC](/photos/6/59/65909/150-28-soic_sml.jpg)
PIC18F252-E/SO
Manufacturer Part Number
PIC18F252-E/SO
Description
IC MCU CMOS 40MHZ 16K FLSH28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
Specifications of PIC18F252-E/SO
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Controller Family/series
PIC18
No. Of I/o's
23
Eeprom Memory Size
256Byte
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
23
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F252-E/SO
Manufacturer:
MICROCHIP
Quantity:
53
PIC18FXX2
3. Module: Interrupts
DS80150D-page 2
Note:
Under certain conditions, the use of dual priority
interrupts may cause a program instruction to be
skipped entirely. This has only been observed
when both of the following apply:
• Both high and low interrupts are enabled, and
• A high priority asynchronous interrupt occurs in
The event causes the stack to get pushed twice,
and will eventually result in an overflow.
Work around
Two possible solutions are presented. Other
solutions may exist.
1. Enable only high priority interrupts for all
2. If it is necessary to use both high and low
Date Codes that pertain to this issue:
All engineering and production devices.
the following cycle after any low priority
interrupt.
sources, both synchronous and asynchronous.
interrupt priorities:
• Assign asynchronous interrupts as low
• Assign synchronous interrupts to both high
priority only.
and low priority, as needed.
This does not apply to the INT0 (external)
interrupt, as it is always configured as a
high priority interrupt.
4. Module: Core (Program Memory Space)
5. Module: Data EEPROM
Performing table read operations above the user
program
1FFFFFh) may yield erroneous results at the
extreme low end of the device’s rated temperature
range (-40°C).
This applies specifically to addresses above
1FFFFFh,
(200000h-200007h),
(300000h-30000Dh), and the device ID locations
(3FFFFEh and 3FFFFFh). User program memory
is unaffected.
Work around
Three possible work arounds are presented. Other
solutions may exist.
1. Do not perform table read operations on areas
2. Insert NOP instructions (specifically, literal
Date Codes that pertain to this issue:
All engineering and production devices.
When reading the data EEPROM, the contents of
the EEDATA register may be corrupted if the RD
bit (EECON1<0>) is set immediately following a
write to the address byte (EEADR). The actual
contents of the data EEPROM remain unaffected.
Work around
Do not set EEADR immediately before the
execution of a read. Write to EEADR at least one
instruction cycle before setting the RD bit. The
instruction between the write to EEADR and the
read can be any valid instruction, including a NOP.
Date Codes that pertain to this issue:
All engineering and production devices.
above the user memory space at -40°C.
FFFFh) around any table read instructions.
The suggested optimal number is 4 instruc-
tions before and 8 instructions after each table
read. This may vary depending upon the
particular application, and should be optimized
by the user.
memory
including
© 2005 Microchip Technology Inc.
space
the
the
configuration
user
(addresses
ID
locations
bytes
over