AT32UC3B0256-Z2UR Atmel, AT32UC3B0256-Z2UR Datasheet - Page 345
AT32UC3B0256-Z2UR
Manufacturer Part Number
AT32UC3B0256-Z2UR
Description
MCU AVR32 256K FLASH 64-QFN
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet
1.AT32UC3B164-AUR.pdf
(680 pages)
Specifications of AT32UC3B0256-Z2UR
Package / Case
64-QFN
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
60MHz
Number Of I /o
44
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
32K x 8
Program Memory Size
256KB (256K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Connectivity
I²C, IrDA, SPI, SSC, UART/USART, USB
Core Size
32-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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•
•
Table 21-18.
•
Table 21-19.
•
Table 21-20.
32059J–12/2010
SYNC/CPHA: Synchronous Mode Select or SPI Clock Phase
CHRL: Character Length.
USCLKS: Clock Selection
MODE
0
0
1
1
If USART does not operate in SPI Mode (MODE is … 0xE and 0xF):
SYNC = 0: USART operates in Asynchronous Mode.
SYNC = 1: USART operates in Synchronous Mode.
If USART operates in SPI Mode (MODE = 0xE or 0xF):
CPHA = 0: Data is changed on the leading edge of SPCK and captured on the following edge of SPCK.
CPHA = 1: Data is captured on the leading edge of SPCK and changed on the following edge of SPCK.
CPHA determines which edge of SPCK causes data to change and which edge causes data to be captured. CPHA is used with
0
0
0
0
0
0
1
1
1
0
0
1
1
CPOL to produce the required clock/data relationship between master and slave devices.
USCLKS
CHRL
0
1
0
1
0
0
0
0
1
1
0
1
1
Note:
0
1
0
1
MODE
Others
1. The value of DIV is device dependent. Please refer to the Module Configuration section at the
Character Length
5 bits
6 bits
7 bits
8 bits
end of this chapter.
Selected Clock
CLK_USART
CLK_USART/DIV
Reserved
CLK
0
0
1
1
0
1
0
1
1
(1)
0
1
0
1
0
0
0
0
1
Mode of the USART
Normal
RS485
Hardware Handshaking
Modem
IS07816 Protocol: T = 0
IS07816 Protocol: T = 1
IrDA
SPI Master
SPI Slave
Reserved
AT32UC3B
345
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