DSPIC30F2023-30I/ML Microchip Technology, DSPIC30F2023-30I/ML Datasheet - Page 21

IC DSPIC MCU/DSP 12K 44QFN

DSPIC30F2023-30I/ML

Manufacturer Part Number
DSPIC30F2023-30I/ML
Description
IC DSPIC MCU/DSP 12K 44QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F2023-30I/ML

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
12KB (4K x 24)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Core Frequency
30MHz
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
35
Flash Memory Size
12KB
Supply Voltage Range
3V To 5.5V
Operating Temperature Range
-40°C To +85°C
Package
44QFN EP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16 Bit
Number Of Programmable I/os
35
Interface Type
I2C/SPI/UART
On-chip Adc
12-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F2023-30I/ML
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
8.5.5
The PROGC command programs data to the specified
Configuration register and verifies whether the
programming was successful. Configuration registers
are 16 bits wide, and this command allows one Config-
uration register to be programmed.
Expected Response (2 words):
0x1600
0x0002
© 2010 Microchip Technology Inc.
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
Data
Note:
Opcode
Field
Reserved
12 11
PROGC COMMAND
This command can only be used for
programming Configuration registers.
0x6
0x4
0x0
MSB of 24-bit destination address
LS 16 bits of 24-bit destination
address
Data to program
Addr_LS
Data
8 7
Description
Length
Addr_MSB
0
8.5.6
The ERASEB command performs a Bulk Erase. The MS
field selects the memory to be bulk erased, with options
for erasing individual memory segments.
When Full Chip Erase is selected, the following
memory regions are erased:
• All code memory (even if code-protected)
• All code-protect Configuration registers, including
Only the executive code memory, device ID and
Configuration registers that are not code-protected
remain intact after a Full Chip Erase.
Expected Response (2 words):
0x1700
0x0002
15
Opcode
Length
Reserved 0x0
MS
Opcode
Unit ID
Field
12 11
ERASEB COMMAND
0x7
0x2
Select memory to erase:
interrupt vectors, and FGS Configuration
register
Segments, and the FBS and FGS
Configuration registers
and the FGS Configuration register
0x0 = All Code in General Segment
0x1 = Reserved
0x2 = All Code in General Segment,
0x3 = Full Chip Erase
0x4 = All Code in Boot and General
0x5 = All Code in General Segment,
0x6 = Reserved
0x7 = Reserved
Reserved
Description
Length
DS70284C-page 21
2
MS
0

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