AT32UC3A364S-CTUR Atmel, AT32UC3A364S-CTUR Datasheet - Page 43

IC MCU 64KB FLASH 144TFBGA

AT32UC3A364S-CTUR

Manufacturer Part Number
AT32UC3A364S-CTUR
Description
IC MCU 64KB FLASH 144TFBGA
Manufacturer
Atmel
Series
AVR®32 UC3r
Datasheet

Specifications of AT32UC3A364S-CTUR

Package / Case
144-TBGA
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Operating Temperature
-40°C ~ 85°C
Speed
66MHz
Number Of I /o
110
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
128K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, DMA, POR, WDT
Connectivity
EBI/EMI, I²C, IrDA, MMC, SPI, SSC, UART/USART, USB OTG
Core Size
32-Bit
Processor Series
AT32UC3x
Core
AVR32
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
2-Wire, I2S, JTAG, SPI, USART
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
23
Number Of Timers
4
Operating Supply Voltage
- 0.3 V to + 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1104
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
9. Boot Sequence
9.1
9.2
32072AS–AVR32–03/09
Starting of Clocks
Fetching of Initial Instructions
This chapter summarizes the boot sequence of the AT32UC3A3. The behavior after power-up is
controlled by the Power Manager. For specific details, refer to
on page
After power-up, the device will be held in a reset state by the Power-On Reset circuitry, until the
power has stabilized throughout the device. Once the power has stabilized, the device will use
the internal RC Oscillator as clock source.
On system start-up, the PLLs are disabled. All clocks to all modules are running. No clocks have
a divided frequency, all parts of the system receives a clock with the same frequency as the
internal RC Oscillator.
After reset has been released, the AVR32 UC CPU starts fetching instructions from the reset
address, which is 0x8000_0000. This address points to the first address in the internal Flash.
The code read from the internal Flash is free to configure the system to use for example the
PLLs, to divide the frequency of the clock routed to some of the peripherals, and to gate the
clocks to unused peripherals.
36.
Section 8. ”Power Manager (PM)”
AT32UC3A3
43

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