PIC24FJ128DA206-I/PT Microchip Technology, PIC24FJ128DA206-I/PT Datasheet - Page 147
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PIC24FJ128DA206-I/PT
Manufacturer Part Number
PIC24FJ128DA206-I/PT
Description
MCU PIC 16BIT FLASH 128K 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ128DA206-I/PT
Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
52
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
29
Number Of Timers
5
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, AC164127-4, AC164127-6, AC164139, DM240312, DV164039
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA206-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 147 of 408
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REGISTER 8-4:
2010 Microchip Technology Inc.
GCLKDIV6
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at all Resets
bit 15-9
bit 8-0
Note 1:
R/W-0
U-0
—
These bits take effect only when the 96 MHz PLL is enabled.
(1)
GCLKDIV5
GCLKDIV<6:0>: Display Module Interface Clock Divider Selection bits
(Values are based on a 96 MHz clock source set by G1CLKSEL (CLKDIV<4>) = 1. When the 48 MHz
clock source is selected, G1CLKSEL (CLKDIV<4>) = 0; all values are divided by 2.)
1111111 = (127) 1.50 MHz (divide by 64)
1111110 = (126) 1.52 MHz (divide by 63)
·
·
·
1100001 = (97) 2.82 MHz (divide by 34)
1100000 = (96) 2.91 MHz (divide by 33); from here, increment the divisor by 1.00
1011111 = (95) 2.95 MHz (divide by 32.50)
·
·
·
1000000 = (65) 5.49 MHz (divide by 17.50)
1000000 = (64) 5.65 MHz (divide by 17.00); from here, increment the divisor by 0.50
0111111 = (63) 5.73 MHz (divide by 16.75)
·
·
·
0000011 = (3) 54.86 MHz (divide by 1.75)
0000010 = (2) 64.00 MHz (divide by 1.5)
0000001 = (1) 76.80 MHz (divide by 1.25); from here, increment the divisor by 0.25
0000000 = (0) 96.00 MHz (divide by 1)
Unimplemented: Read as ‘0’
R/W-0
U-0
—
CLKDIV2: CLOCK DIVIDER REGISTER 2
(1)
GCLKDIV4
W = Writable bit
‘1’ = Bit is set
R/W-0
U-0
—
(1)
GCLKDIV3
PIC24FJ256DA210 FAMILY
R/W-0
U-0
—
(1)
U = Unimplemented bit, read as ‘0’
GCLKDIV2
‘0’ = Bit is cleared
R/W-0
U-0
—
(1)
GCLKDIV1
R/W-0
U-0
—
(1)
(1)
GCLKDIV0
x = Bit is unknown
R/W-0
U-0
—
DS39969B-page 147
(1)
(1)
U-0
U-0
—
—
bit 8
bit 0
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