PIC24FJ128DA206-I/PT Microchip Technology, PIC24FJ128DA206-I/PT Datasheet - Page 228
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PIC24FJ128DA206-I/PT
Manufacturer Part Number
PIC24FJ128DA206-I/PT
Description
MCU PIC 16BIT FLASH 128K 64TQFP
Manufacturer
Microchip Technology
Series
PIC® 24Fr
Specifications of PIC24FJ128DA206-I/PT
Core Size
16-Bit
Program Memory Size
128KB (43K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, GFX, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC24
No. Of I/o's
52
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
Interface
I2C, SPI, UART, USB
Embedded Interface Type
I2C, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
29
Number Of Timers
5
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, AC164127-4, AC164127-6, AC164139, DM240312, DV164039
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC24FJ128DA206-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC24FJ256DA210 FAMILY
REGISTER 16-2:
DS39969B-page 228
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
HSC = Hardware Settable/Clearable bit
bit 15
bit 14
bit 13-11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
ACKSTAT
R/C-0, HS
R-0, HSC
IWCOL
ACKSTAT: Acknowledge Status bit
1 = NACK was detected last
0 = ACK was detected last
Hardware is set or clear at the end of Acknowledge.
TRSTAT: Transmit Status bit
(When operating as I
1 = Master transmit is in progress (8 bits + ACK)
0 = Master transmit is not in progress
Hardware is set at the beginning of master transmission; hardware is clear at the end of slave Acknowledge.
Unimplemented: Read as ‘0’
BCL: Master Bus Collision Detect bit
1 = A bus collision has been detected during a master operation
0 = No collision
Hardware is set at the detection of a bus collision.
GCSTAT: General Call Status bit
1 = General call address was received
0 = General call address was not received
Hardware is set when the address matches the general call address; hardware is clear at Stop detection.
ADD10: 10-Bit Address Status bit
1 = 10-bit address was matched
0 = 10-bit address was not matched
Hardware is set at the match of the 2
IWCOL: Write Collision Detect bit
1 = An attempt to write to the I2CxTRN register failed because the I
0 = No collision
Hardware is set at an occurrence of write to I2CxTRN while busy (cleared by software).
I2COV: Receive Overflow Flag bit
1 = A byte was received while the I2CxRCV register is still holding the previous byte
0 = No overflow
Hardware is set at an attempt to transfer I2CxRSR to I2CxRCV (cleared by software).
D/A: Data/Address bit (when operating as I
1 = Indicates that the last byte received was data
0 = Indicates that the last byte received was a device address
Hardware is clear at the device address match. Hardware is set after a transmission finishes or by
reception of a slave byte.
R/C-0, HS
R-0, HSC
TRSTAT
I2COV
I2CxSTAT: I2Cx STATUS REGISTER
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
R-0, HSC
D/A
U-0
—
2
C™ master. Applicable to master transmit operation.)
R/C-0, HSC
U-0
—
P
nd
byte of the matched 10-bit address; hardware is clear at Stop detection.
HS = Hardware Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/C-0, HSC
2
C slave)
U-0
—
S
R/C-0, HS
R-0, HSC
BCL
R/W
2
C module is busy
x = Bit is unknown
2010 Microchip Technology Inc.
R-0, HSC
R-0, HSC
GCSTAT
RBF
R-0, HSC
R-0, HSC
ADD10
TBF
bit 8
bit 0
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