AT90CAN64-16AU Atmel, AT90CAN64-16AU Datasheet - Page 352

• Manufacturer Part Number: AT90CAN64-16AU
• Description: IC MCU AVR 64K FLASH 64-TQFP
• Manufacturer: Atmel
• Series: AVR® 90CANr

Specifications of AT90CAN64-16AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Package: 64TQFP
• Device Core: AVR
• Family Name: 90C
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 53
• Interface Type: JTAG/SPI/TWI/USART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 4
• Processor Series: AT90CANx
• Core: AVR8
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATDVK90CAN1, ATADAPCAN01
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AVR CAN
• No. Of I/o's: 53
• Eeprom Memory Size: 2KB
• Ram Memory Size: 4KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• Cpu Family: 90C
• Device Core Size: 8b
• Frequency (max): 16MHz
• Total Internal Ram Size: 4KB
• # I/os (max): 53
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: TQFP
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATDVK90CAN1 - KIT DEV FOR AT90CAN128 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 25-15. Serial Programming Instruction Set (Continued)
Notes:
25.9
352
Instruction
Load
EEPROM Memory
Page (page access)
Write
EEPROM Memory
Page (page access)
Read Lockbits
Write
Lock bits
Read
Signature Byte
Write
Fuse Low bits
Write
Fuse High bits
Write
Extended Fuse Bits
Read
Fuse Low bits
Read
Fuse High bits
Read
Extended Fuse Bits
Read
Calibration Byte
Poll RDY/BSY
1. All bytes are represented by binary digits (0b...).
2. Address bits exceeding PCMSB and EEAMSB (see
JTAG Programming Overview
AT90CAN32/64/128
Set
a = address high bits, b = address low bits, H = 0 - Low byte, 1 - High Byte, o = data out, i = data in, x = don’t care
1100 0001 0000 0000 0000 0bbb iiii iiii
1100 0010 000x aaaa bbbb b000 xxxx xxxx Write EEPROM page at address a:b.
0101 1000 0000 0000 xxxx xxxx xxoo oooo
1010 1100 111x xxxx xxxx xxxx 11ii iiii
0011 0000 000x xxxx xxxx xxbb oooo oooo Read Signature Byte o at address b.
1010 1100 1010 0000 xxxx xxxx iiii iiii
1010 1100 1010 1000 xxxx xxxx iiii iiii
1010 1100 1010 0100 xxxx xxxx xxxx iiii
0101 0000 0000 0000 xxxx xxxx oooo oooo
0101 1000 0000 1000 xxxx xxxx oooo oooo
0101 0000 0000 1000 xxxx xxxx oooo oooo
0011 1000 000x xxxx 0000 0000 oooo oooo Read Calibration Byte
1111 0000 0000 0000 xxxx xxxx xxxx xxxo
Byte 1
Programming through the JTAG interface requires control of the four JTAG specific pins: TCK,
TMS, TDI, and TDO. Control of the reset and clock pins is not required.
To be able to use the JTAG interface, the JTAGEN Fuse must be programmed. The device is
default shipped with the fuse programmed. In addition, the JTD bit in MCUCR must be cleared.
Alternatively, if the JTD bit is set, the external reset can be forced low. Then, the JTD bit will be
cleared after two chip clocks, and the JTAG pins are available for programming. This provides a
means of using the JTAG pins as normal port pins in Running mode while still allowing In-Sys-
tem Programming via the JTAG interface. Note that this technique can not be used when using
Byte 2
Instruction Format
(2)
Byte 3
(1)
Table 25-11 on page 341
Byte4
Operation
Load data i to EEPROM memory page buffer. After
data is loaded, program EEPROM page.
Read Lock bits. “0”=programmed, “1”=unprogrammed.
See
Write Lock bits. Set bits = “0” to program Lock bits.
See
Set bits = “0” to program, “1” to unprogram.
See
Set bits = “0” to program, “1” to unprogram.
See
Set bits = “0” to program, “1” to unprogram.
See
Read Fuse bits. “0”=programmed, “1”=unprogrammed.
See
Read Fuse High bits.
“0”=programmed, “1”=unprogrammed.
See
Read Extended Fuse bits.
“0”=programmed, “1”=unprogrammed.
See
If o = “1”, a programming operation is still busy. Wait
until this bit returns to “0” before applying another
command.
Table 25-1 on page 336
Table 25-1 on page 336
Table 25-5 on page 338
Table 25-4 on page 337
Table 25-3 on page 337
Table 25-5 on page 338
Table 25-4 on page 337
Table 25-3 on page 337
and
(1)
Table 25-12 on page
for details.
for details.
for details.
for details.
for details.
for details.
for details.
for details.
341) are don’t care.
7679H–CAN–08/08