ATSAM3U2CA-AU Atmel, ATSAM3U2CA-AU Datasheet - Page 702
ATSAM3U2CA-AU
Manufacturer Part Number
ATSAM3U2CA-AU
Description
IC MCU 32BIT 128KB FLASH 100LQFP
Manufacturer
Atmel
Series
SAM3Ur
Specifications of ATSAM3U2CA-AU
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
96MHz
Connectivity
EBI/EMI, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
57
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
36K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b, 4x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
SAM3U
No. Of I/o's
57
Ram Memory Size
36KB
Cpu Speed
96MHz
No. Of Timers
3
Rohs Compliant
Yes
Processor Series
ATSAM3x
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
36 KB
Interface Type
3xUSART, TWI, 4xSPI, Bus
Maximum Clock Frequency
96 MHz
Number Of Programmable I/os
57
Number Of Timers
8
Operating Supply Voltage
1.62 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-CM3, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
ATSAM3U-EK
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U2CA-AU
Manufacturer:
INFINEON
Quantity:
12 000
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35.7.3.5
702
702
SAM3U Series
SAM3U Series
Radio Interface: Manchester Encoded USART Application
Figure 35-15. Preamble Pattern Mismatch
Figure 35-16. Manchester Error Flag
When the start frame delimiter is a sync pattern (ONEBIT field to 0), both command and data
delimiter are supported. If a valid sync is detected, the received character is written as RXCHR
field in the US_RHR register and the RXSYNH is updated. RXCHR is set to 1 when the received
character is a command, and it is set to 0 if the received character is a data. This mechanism
alleviates and simplifies the direct memory access as the character contains its own sync field in
the same register.
As the decoder is setup to be used in unipolar mode, the first bit of the frame has to be a zero-to-
one transition.
This section describes low data rate RF transmission systems and their integration with a Man-
chester encoded USART. These systems are based on transmitter and receiver ICs that support
ASK and FSK modulation schemes.
The goal is to perform full duplex radio transmission of characters using two different frequency
carriers. See the configuration in
Manchester
encoded
Manchester
data
encoded
data
sampling points
Txd
Txd
Manchester coding error
Preamble Length
Preamble Mismatch
Figure
is set to 4
Preamble Length is set to 8
35-17.
and Start Frame Delimiter
Preamble subpacket
were successfully
SFD
Preamble Mismatch
decoded
invalid pattern
Entering USART character area
Elementary character bit time
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
SFD
Coding Error
Manchester
detected
DATA
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