DSPIC30F6010T-30I/PF Microchip Technology, DSPIC30F6010T-30I/PF Datasheet

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DSPIC30F6010T-30I/PF

Manufacturer Part Number
DSPIC30F6010T-30I/PF
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F6010T-30I/PF

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
For Use With
DM300019 - BOARD DEMO DSPICDEM 80L STARTERAC164314 - MODULE SKT FOR PM3 80PFDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRLAC30F001 - MODULE SOCKET DSPIC30F 80TQFPXLT80PT2 - SOCKET TRANSITION ICE 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
DSPIC30F6010T30IP

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F6010T-30I/PF
Manufacturer:
Microchip Technology
Quantity:
10 000
The dsPIC30F6010 family devices that you have
received conform functionally to the current Device Data
Sheet (DS70119E), except for the anomalies described
in this document.
The silicon issues discussed in the following pages are
for silicon revisions with the Device and Revision IDs
listed in Table 1. The silicon issues are summarized in
Table 2.
The errata described in this document will be addressed
in future revisions of the dsPIC30F6010 silicon.
Data Sheet clarifications and corrections start on page 26,
following the discussion of silicon issues.
The silicon revision level can be identified using the
current version of MPLAB
programmers, debuggers and emulation tools, which
are available at the Microchip corporate web site
(www.microchip.com).
TABLE 1:
© 2010 Microchip Technology Inc.
dsPIC30F6010
Note 1:
Note:
2:
The Device and Revision IDs (DEVID and DEVREV) are located at the last two implemented addresses in
program memory.
Refer to the “dsPIC30F Flash Programming Specification” (DS70102) for detailed information on Device
and Revision IDs for your specific device.
This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated in the last column of
Table 2 apply to the current silicon revision
(B2).
Part Number
SILICON DEVREV VALUES
Silicon Errata and Data Sheet Clarification
®
IDE and Microchip’s
dsPIC30F6010 Family
Device ID
0x0188
dsPIC30F6010
(1)
For example, to identify the silicon revision level using
MPLAB IDE in conjunction with MPLAB ICD 2 or
PICkit™ 3:
1.
2.
3.
4.
The Device and Revision ID values for the various
dsPIC30F6010 silicon revisions are shown in Table 1.
Note:
Using the appropriate interface, connect the device
to the MPLAB ICD 2 programmer/debugger or
PICkit 3.
From the main menu in MPLAB IDE, select
Configure>Select Device, and then select the
target part number in the dialog box.
Select
(Debugger>Select Tool).
Perform a “Connect” operation to the device
(Debugger>Connect). Depending on the devel-
opment tool used, the part number and Device
Revision ID value appear in the Output window.
If you are unable to extract the silicon
revision level, please contact your local
Microchip sales office for assistance.
the
Revision ID for Silicon Revision
0x1040
MPLAB
B1
hardware
DS80459D-page 1
0x1042
B2
tool
(2)

Related parts for DSPIC30F6010T-30I/PF

DSPIC30F6010T-30I/PF Summary of contents

Page 1

... Refer to the “dsPIC30F Flash Programming Specification” (DS70102) for detailed information on Device and Revision IDs for your specific device. © 2010 Microchip Technology Inc. dsPIC30F6010 dsPIC30F6010 Family For example, to identify the silicon revision level using MPLAB IDE in conjunction with MPLAB ICD 2 or PICkit™ ...

Page 2

... The 10-bit ADC exhibits a maximum gain error of ±3 Least Significant bits (LSbs). The Motor Control PWM time base prescaler options, 1:4, 1:16 and 1:64, may produce unexpected results when used to generate PWM pulses. Affected (1) Revisions © 2010 Microchip Technology Inc. ...

Page 3

... Operations Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. Issue Summary The output override function of the PWM module, controlled by the OVDCON register and the OSYNC bit (PWMCON2<1>), produces unexpected results when OSYNC = 1. ...

Page 4

... POSCNT increments and generates an interrupt after a match with MAXCNT. If the ADC module enabled state when the device enters Sleep Mode, the power-down current (I may exceed the device data sheet specifications. Affected (1) Revisions ® DSC device the device PD © 2010 Microchip Technology Inc. ...

Page 5

... MUL.UU. Affected Silicon Revisions © 2010 Microchip Technology Inc. 3. Module: CPU Sequential MAC class instructions, which prefetch data from Y data space using ±4 address modification, will cause an address error trap. The trap occurs only when all of the following conditions are true: 1 ...

Page 6

... BCD number mov.b #0x80, w1 ;Second BCD number add.b w0, w1, w2 ;Perform addition bra NC, L0 ;If C set daw.b w2 ;If not,do DAW and bset.b SR, #C ;set the carry bit bra L1 ;and exit L0:daw.b w2 L1: .... Affected Silicon Revisions DS80459D-page 6 © 2010 Microchip Technology Inc. ...

Page 7

... RAM register prior to performing the operations listed in Table 3. The work around for Example 2 is demonstrated in Example 3. © 2010 Microchip Technology Inc. Also, always use Work around 2 if the C compiler is used to generate code for dsPIC30F6010 devices. ...

Page 8

... Y data memory is not immediately followed by a instruction that performs a read operation of a location in Y data memory. Affected Silicon Revisions © 2010 Microchip Technology Inc. may take DSP MAC-type ...

Page 9

... (SR<15/14>), is not cleared within the trap handler routine prior to exiting the trap handler routine, the processor will immediately re-enter the trap handler routine. © 2010 Microchip Technology Inc. dsPIC30F6010 Work around If a math error trap occurs due to a catastrophic accumulator overflow, the overflow status flags, OA and/or OB (SR< ...

Page 10

... Example 9. This will disable all interrupts between priority levels 1 through 7. EXAMPLE 9: RAISE IPL BEFORE RETFIE __T1Interrupt: ;Timer1 ISR PUSH W0 ....... BCLR IFS0, #T1IF MOV.B #0xE0, W0 MOV.B WREG, SR POP W0 RETFIE ;Another interrupt occurs ;here and it is processed ;correctly Affected Silicon Revisions © 2010 Microchip Technology Inc. ...

Page 11

... Affected Silicon Revisions © 2010 Microchip Technology Inc. dsPIC30F6010 12. Module: Output Compare If the desired duty cycle is ‘0’ (OCxRS = 0), the module will generate a high level glitch The second problem is that on the next cycle after the glitch, the OC pin does not go high, or, in other words, it misses the next compare for any value written on OCxRS ...

Page 12

... PWM pulses. Work around The prescaler should be set to the 1:1 option (i.e., prescaler should be disabled) in this release of silicon when generating PWM pulses. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...

Page 13

... Results are shown here for the PWM1H and PWM1L pins only. Similar results will be observed for any other pair of complementary output pins (PWM2H/L, PWM3H/L and PWM4H/L) and any other chosen duty cycle. © 2010 Microchip Technology Inc. Observed Output PWM Low ...

Page 14

... MPLAB C30 v1.20.02 toolsuite. The function has the following prototype: unsigned__builtin_readsfr(volatile void *); The function argument is the address of a 16-bit SFR. This function should only be used to read the CAN SFRs. Affected Silicon Revisions © 2010 Microchip Technology Inc. Informatik’s ...

Page 15

... Note 1: Applications that use the CAN peripherals and Data EEPROM should also refer to module 1. (Data EEPROM) and module 21. (CAN). © 2010 Microchip Technology Inc. 23. Module: V Operating Voltage Applications operating off 5 volts V DD should ensure the V and 5 ...

Page 16

... DISI state. For temporarily modifying and restoring the CPU IPL, the mac- ros RESTORE_CPU_IPL can be used, as shown in Example 13. These macros also make use of the SET_CPU_IPL macro. USING DISI USING SET_CPU_IPL MACRO \ \ and SET_AND_SAVE_CPU_IPL © 2010 Microchip Technology Inc. ...

Page 17

... SET_AND_SAVE_CPU_IPL (save_sr, 7);\ x; \ RESTORE_CPU_IPL (save_sr); } (void INTERRUPT_PROTECT (IEC0bits.U1TXIE=0); Note: If you are using a MPLAB C30 compiler version earlier than version 1.32, you may still use the macros by adding them to your application. Affected Silicon Revisions © 2010 Microchip Technology Inc. shown in dsPIC30F6010 DS80459D-page 17 ...

Page 18

... POSCNT, the variable will toggle bit 15. Example 15 shows the code required for this global variable. Affected Silicon Revisions Instead of 0xFFFF // Clear QEI interrupt flag // x=2 for dsPIC30F // x=3 for dsPIC33F © 2010 Microchip Technology Inc. ...

Page 19

... NOP .endr ; Place SLEEP instruction in the last word of program memory PWRSAV #0 © 2010 Microchip Technology Inc. This can be accomplished by replacing all occurrences of the PWRSAV #0 instruction with a function call to a suitably aligned subroutine. The address( ) attribute provided by the MPLAB ASM30 assembler can be utilized to correctly align the instructions in the subroutine ...

Page 20

... Note: The above work around is recommended for users for whom application hardware changes are possible, and also for users whose includes a 32 kHz LP Oscillator crystal. Affected Silicon Revisions Section 29. “Oscillator” application hardware already © 2010 Microchip Technology Inc. ...

Page 21

... This will also clear the RBF flag Clear the I C receiver interrupt flag SI2CF back to step 1 to continue receiving incoming data bytes. © 2010 Microchip Technology Inc. dsPIC30F6010 Work around 2: Use this work around for applications in which the receiver interrupt is required. Assuming that ...

Page 22

... C language, MPLAB C30 version 3.11 or higher, provides the following command-line switch that implements a work around for the erratum. -merrata=psv_trap Refer to the readme.txt file in the MPLAB C30 v3.11 tool suite for further details. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...

Page 23

... Work around None. Affected Silicon Revisions © 2010 Microchip Technology Inc. 38. Module: I When the I I2CEN bit in the I2CCON register, the dsPIC DSC device generates a glitch on the SDA and SCL pins. This glitch falsely indicates “Communication Start” to all devices on the I with the a bus collision in a multi-master configuration ...

Page 24

... IPC2\n\t” “mov #IPC2, w0\n\t” “mov.d [--w15], w0”); //Note: There are no commas between // the quoted strings in the code // segment above. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...

Page 25

... ADC module by setting the ADC Module Disable bit in the corresponding Peripheral Module (PMDx) register, prior to executing a PWRSAV #0 instruction. Affected Silicon Revisions © 2010 Microchip Technology Inc. specifications Disable dsPIC30F6010 DS80459D-page 25 ...

Page 26

... Standard Operating Conditions: 3.3V and 5.0V (±10%) (unless otherwise stated) Operating temperature Min Typ Max V — 0.8 SS 2.1 — -40°C ≤ T ≤ +85°C for Industrial A -40°C ≤ T ≤ +125°C for Extended A Units Conditions V SMbus enabled V SMbus enabled © 2010 Microchip Technology Inc. ...

Page 27

... Updated silicon issue 25 (Interrupt Controller). Added silicon issues 42 (QEI) and 43 (QEI). Rev C Document (2/2010) Updated silicon issue 25 (Interrupt Controller). Rev D Document (6/2010) Added silicon issue 44 (ADC) and data sheet clarification 1 (DC Characteristics: I/O Pin Input Specifications). © 2010 Microchip Technology Inc C), 39 dsPIC30F6010 DS80459D-page 27 ...

Page 28

... NOTES: DS80459D-page 28 © 2010 Microchip Technology Inc. ...

Page 29

... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 30

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2010 Microchip Technology Inc. 01/05/10 ...

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