AT91SAM7S512-MU Atmel, AT91SAM7S512-MU Datasheet - Page 612

• Manufacturer Part Number: AT91SAM7S512-MU
• Description: MCU ARM 512K HI SPD FLASH 64-QFN
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7S512-MU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 55MHz
• Connectivity: I²C, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VQFN Exposed Pad, 64-HVQFN, 64-SQFN, 64-DHVQFN
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7S-EK - KIT EVAL FOR ARM AT91SAM7S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

40.5.9.4
40.5.9.5
612
AT91SAM7S Series Preliminary
USART: RXBRK Flag Error in Asynchronous Mode
USART: DCD is active High instead of Low
None.
In receiver mode, when there are two consecutive characters (without timeguard in between),
RXBRK is not taken into account. As a result, the RXBRK flag is not enabled correctly and the
frame error flag is set.
Constraints on the transmitter device connected to the AT91SAM7S USART receiver side:
The transmitter may use the timeguard feature or send two STOP conditions. Only one STOP
condition is taken into account by the receiver state machine. After this STOP condition, as there
is no valid data, the receiver state machine will go in idle mode and enable the RXBRK flag.
The DCD signal is active at High level in the USART Modem Mode.
DCD should be active at Low level.
Add an inverter.
Problem Fix/Workaround
Problem Fix/Workaround
Problem Fix/Workaround
6175K–ATARM–30-Aug-10