P89LPC936FA,529 NXP Semiconductors, P89LPC936FA,529 Datasheet - Page 50

• Manufacturer Part Number: P89LPC936FA,529
• Description: IC 80C51 MCU FLASH 16K 28-PLCC
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC936FA,529

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-PLCC
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 26
• Eeprom Size: 512 x 8
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC9x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 26
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 8-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935278702529; P89LPC936FA-S; P89LPC936FA-S

NXP Semiconductors
P89LPC933_934_935_936
Product data sheet
8.28.3 Flash organization
8.28.4 Using flash as data storage
8.28.5 Flash programming and erasing
8.28.6 In-circuit programming
8.28.7 In-application programming
The program memory consists of eight 2 kB sectors on the P89LPC936 device, eight 1 kB
sectors on the P89LPC934/935 devices, and four 1 kB sectors on the P89LPC933 device.
Each sector can be further divided into 64-byte pages. In addition to sector erase, page
erase, and byte erase, a 64-byte page register is included which allows from 1 to 64 bytes
of a given page to be programmed at the same time, substantially reducing overall
programming time.
The flash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a MOVC
instruction is not allowed to read code memory contents of a secured sector). Thus any
byte in a non-secured sector may be used for non-volatile data storage.
Four different methods of erasing or programming of the flash are available. The flash
may be programmed or erased in the end-user application (IAP) under control of the
application’s firmware. Another option is to use the ICP mechanism. This ICP system
provides for programming through a serial clock - serial data interface. As shipped from
the factory, the upper 512 bytes of user code space contains a serial ISP routine allowing
the device to be programmed in circuit through the serial port. The flash may also be
programmed or erased using a commercially available EPROM programmer which
supports this device. This device does not provide for direct verification of code memory
contents. Instead, this device provides a 32-bit CRC result on either a sector or the entire
user code space.
ICP is performed without removing the microcontroller from the system. The ICP facility
consists of internal hardware resources to facilitate remote programming of the
P89LPC933/934/935/936 through a two-wire serial interface. The Philips ICP facility has
made ICP in an embedded application—using commercially available
programmers—possible with a minimum of additional expense in components and circuit
board area. The ICP function uses five pins. Only a small connector needs to be available
to interface your application to a commercial programmer in order to use this feature.
Additional details may be found in the P89LPC933/934/935/936 User manual.
IAP is performed in the application under the control of the microcontroller’s firmware. The
IAP facility consists of internal hardware resources to facilitate programming and erasing.
The Philips IAP has made IAP in an embedded application possible without additional
components. Two methods are available to accomplish IAP. A set of predefined IAP
functions are provided in a boot ROM and can be called through a common interface,
PGM_MTP. Several IAP calls are available for use by an application program to permit
selective erasing and programming of flash sectors, pages, security bits, configuration
bytes, and device ID. These functions are selected by setting up the microcontroller’s
registers before making a call to PGM_MTP at FF03H. The boot ROM occupies the
program memory space at the top of the address space from FF00H to FFEFH, thereby
not conflicting with the user program memory space.
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 12 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC933/934/935/936
© NXP B.V. 2011. All rights reserved.
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