P89CV51RD2FBC,557 NXP Semiconductors, P89CV51RD2FBC,557 Datasheet - Page 30

• Manufacturer Part Number: P89CV51RD2FBC,557
• Description: IC 80C51 MCU FLASH 64K 44-TQFP
• Manufacturer: NXP Semiconductors
• Series: 89Cr

Specifications of P89CV51RD2FBC,557

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: P89CV5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 4.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: 89C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 1KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-4257; 935284103557; P89CV51RD2FBC

NXP Semiconductors
P89CV51RB2_RC2_RD2_3
Product data sheet
6.5 Timer 2
Timer 2 is a 16-bit timer/counter which can operate as either an event timer or an event
counter, as selected by C/T2 in the special function register T2CON. Timer 2 has four
operating modes: Capture, Auto-reload (up or down counting), Clock-out, and Baud rate
generator which are selected according to
and T2MOD
Table 18.
Table 19.
Bit addressable; reset value: 00H.
Table 20.
RCLK + TCLK
0
0
0
1
X
Bit
Symbol
Bit
7
6
5
Fig 10. Timer/counter 0 Mode 3 (two 8-bit counters)
INT0 pin
TnGate
T0 pin
osc/6
TR0
Symbol
TF2
EXF2
RCLK
Timer 2 operating mode
T2CON - Timer/Counter 2 control register (address C8H) bit allocation
T2CON - Timer/Counter 2 control register (address C8H) bit description
(Table 21
TF2
7
CP/RL2
0
1
0
X
X
Description
Timer 2 overflow flag set by a Timer 2 overflow and must be cleared by
software. TF2 will not be set when either RCLK or TCLK = 1 or when Timer
2 is in Clock-out mode.
Timer 2 external flag is set when Timer 2 is in capture, reload or baud rate
mode, EXEN2 = 1 and a negative transition on T2EX occurs. If Timer 2
interrupt is enabled EXF2 = 1 causes the CPU to vector to the Timer 2
interrupt routine. EXF2 must be cleared by software.
Receive clock flag. When set, causes the UART to use Timer 2 overflow
pulses for its receive clock in modes 1 and 3. RCLK = 0 causes Timer 1
overflow to be used for the receive clock.
Rev. 03 — 25 August 2009
EXF2
and
6
osc/2
TR1
C/T = 0
C/T = 1
Table
RCLK
22).
TR2
1
1
1
1
0
5
P89CV51RB2/RC2/RD2
TCLK
Table 18
control
control
4
T2OE
0
0
1
0
X
using T2CON
EXEN2
(8-bits)
(8-bits)
TH0
TL0
3
overflow
overflow
80C51 with 1 kB RAM, SPI
Mode
16-bit auto reload
16-bit capture
Programmable clock-out
Baud rate generator
off
TR2
2
(Table 19
TF0
TF1
© NXP B.V. 2009. All rights reserved.
C/T2
1
and
002aaa522
interrupt
interrupt
Table
CP/RL2
30 of 76
0
20)