LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 56

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
11. Dynamic characteristics
Table 9.
T
[1]
[2]
[3]
LPC2468
Product data sheet
Symbol
External clock
f
T
t
t
t
t
I
t
SSP interface
t
osc
CHCX
CLCX
CLCH
CHCL
2
f(o)
su(SPI_MISO)
amb
Fig 13. External clock timing (with an amplitude of at least V
cy(clk)
C-bus pins (P0[27] and P0[28])
Parameters are valid over operating temperature range unless otherwise specified.
Typical ratings are not guaranteed. The values listed are at room temperature (25 °C), nominal supply voltages.
Bus capacitance C
=
−
40
°
Dynamic characteristics
C to +85
Parameter
oscillator frequency
clock cycle time
clock HIGH time
clock LOW time
clock rise time
clock fall time
output fall time
SPI_MISO set-up time
b
°
C for commercial applications; V
in pF, from 10 pF to 400 pF.
All information provided in this document is subject to legal disclaimers.
t
CHCL
Rev. 5 — 15 October 2010
DD(3V3)
Conditions
V
T
measured in
SPI Master
mode; see
Figure 17
amb
IH
to V
t
CLCX
= 25 °C;
over specified ranges.
IL
i(RMS)
T
cy(clk)
= 200 mV)
t
CLCH
t
CHCX
Min
1
42
T
T
-
-
20 + 0.1 × C
-
cy(clk)
cy(clk)
× 0.4
× 0.4
[1]
Single-chip 16-bit/32-bit micro
b
[3]
002aaa907
Typ
-
-
-
-
-
-
-
11
[2]
LPC2468
© NXP B.V. 2010. All rights reserved.
Max
25
1000
-
-
5
5
-
-
56 of 85
Unit
MHz
ns
ns
ns
ns
ns
ns
ns