W78L801A24LL Nuvoton Technology Corporation of America, W78L801A24LL Datasheet - Page 12

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W78L801A24LL

Manufacturer Part Number
W78L801A24LL
Description
IC MCU 8-BIT 4K ROM 48-LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet

Specifications of W78L801A24LL

Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
EBI/EMI
Peripherals
LED, WDT
Number Of I /o
36
Program Memory Size
4KB (4K x 8)
Program Memory Type
Mask ROM
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W78L801A24LL
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Typical Watch-Dog time-out period when OSC = 20 MHz
Clock
The W78L801 is designed to be used with either a crystal oscillator or an external clock. Internally, the
clock is divided by two before it is used. This makes the W78L801 relatively insensitive to duty cycle
variations in the clock. The W78L801 incorporates a built-in crystal oscillator. To make the oscillator
work, a crystal must be connected across pins XTAL1 and XTAL2. In addition, a load capacitor must
be connected from each pin to ground. An external clock source should be connected to pin XTAL1.
Pin XTAL2 should be left unconnected. The XTAL1 input is a CMOS-type input, as required by the
crystal oscillator.
Power Management
Idle Mode
Power-down Mode
AUXR – Auxiliary Register
The idle mode is entered by setting the IDL bit in the PCON register. In the idle mode, the internal
clock to the processor is stopped. The peripherals and the interrupt logic continue to be clocked.
The processor will exit idle mode when either an interrupt or a reset occurs.
When the PD bit in the PCON register is set, the processor enters the power-down mode. In this
mode all of the clocks are stopped, including the oscillator. To exit from power-down mode is by a
hardware reset or external interrupts INT2 to INT9 when enabled.
AO:
PS2 PS1 PS0
0
0
0
0
1
1
1
1
Turn off ALE signal.
0
1
0
1
0
0
1
1
0
0
1
1
0
1
0
1
Bit:
Mnemonic: AUXR
7
-
6
-
- 12 -
5
-
WATCHDOG TIME-OUT PERIOD
4
-
Address: 8Eh
157.28 mS
314.57 mS
629.14 mS
19.66 mS
39.32 mS
78.64 mS
1.25 S
2.50 S
3
-
2
-
W78L801
1
-
AO
0

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