W78L801A24LL Nuvoton Technology Corporation of America, W78L801A24LL Datasheet - Page 7
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W78L801A24LL
Manufacturer Part Number
W78L801A24LL
Description
IC MCU 8-BIT 4K ROM 48-LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
W78r
Datasheet
1.W78L801A24LL.pdf
(24 pages)
Specifications of W78L801A24LL
Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
EBI/EMI
Peripherals
LED, WDT
Number Of I /o
36
Program Memory Size
4KB (4K x 8)
Program Memory Type
Mask ROM
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
W78L801A24LL
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
6. FUNCTIONAL DESCRIPTION
The W78L801 architecture consists of a core controller surrounded by various registers, five general
purpose I/O ports, 256 bytes of RAM, two timer/counters. The processor supports 111 different
opcodes and references both a 64K program address space and a 64K data storage space.
Timers 0, 1
Timers 0, 1 each consist of two 8-bit data registers. These are called TL0 and TH0 for Timer 0, TL1
and TH1 for Timer 1. The TCON and TMOD registers provide control functions for timers 0 and 1.
The operations of Timer 0 and Timer 1 are the same as in the W78C51.
I/O Port Options
The Port 0 and Port 3 of W78L801 may be configured with different types by setting the bits of the
Port Options Register POR that is located at 86H. The pins of Port 0 can be configured with either the
open drain or standard port with internal pull-up. By the default, Port 0 is an open drain bi-directional
I/O port. When the PUP bit in the POR register is set, the pins of Port 0 will perform a quasi-bi-
directional I/O port with internal pull-up that is structurally the same as Port 2. The high nibble of Port 3
(P3.4 to P3.7) can be selected to serve the direct LED displays drive outputs by setting the HDx bit in
the PO register. When the HDx bit is set, the corresponding pin P3.x can sink about 20 mA current for
driving LED display directly. After reset, the POR register is cleared and the pins of Ports 0 and 3 are
the same as those of the standard 80C31. The POR register is shown below.
Port Options Register
Port 4
The W78L801 has one additional bit-addressable I/O port P4 in which the port address is D8H. The
Port 4 contains seven bits; P4.0 to P4.3 are only available on 44-pin PLCC/QFP package; P4.5 and
P4.6 are the alternate function corresponding to pins ALE, PSEN . When program is running in the
internal memory without any access to external memory, ALE and PSEN may be individually
configured to the alternate functions P4.5 and P4.6 that serve as general purpose I/O pins. To enable
I/O port P4.5 and P4.6, the bits EP5 and EP6 in the POR register must be set. During reset, the ALE
and PSEN perform as in the standard 80C32. The alternate functions P4.5 and P4.6 must be
enabled by software.
functions. The ALE will emit pulses until either the EP5 bit in POR register or AO bit in AUXR register
P0UP : Enable Port 0 weak pull-up.
HD4-7: Enable pins P3.4 to P3.7 individually with High Drive outputs.
EP5 : Enable P4.5. To set this bit shifts ALE pin to the alternate function P4.5.
EP6 : Enable P4.6. To set this bit shifts PSEN pin to the alternate function P4.6
Bit:
Care must be taken with the ALE pins when configured as the alternate
Mnemonic: POR
EP6
7
EP5
6
- 7 -
5
-
HD7
4
Address: 86H
Publication Release Date: June 04, 2006
HD6
3
HD5
2
HD4
W78L801
1
Revision A10
P0UP
0