Z8F0823PJ005SG Zilog, Z8F0823PJ005SG Datasheet - Page 152

• Manufacturer Part Number: Z8F0823PJ005SG
• Description: IC ENCORE MCU FLASH 8K 28-DIP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0823PJ005SG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Other names: 269-4218; Z8F0823PJ005SG

BITS
FIELD
RESET
R/W
ADDR
Note: U = Unchanged by Reset. R/W = Read/Write.
PS025203-0405
Flash Program Memory Address 0000H
WDT_RES WDT_AO
R/W
U
7
WDT_RES—Watch-Dog Timer Reset
0 = Watch-Dog Timer time-out generates an interrupt request. Interrupts must be globally
enabled for the eZ8 CPU to acknowledge the interrupt request.
1 = Watch-Dog Timer time-out causes a system reset. This setting is the default for unpro-
grammed (erased) Flash.
WDT_AO—Watch-Dog Timer Always On
0 = Watch-Dog Timer is automatically enabled upon application of system power. Watch-
Dog Timer can not be disabled.
1 = Watch-Dog Timer is enabled upon execution of the WDT instruction. Once enabled,
the Watch-Dog Timer can only be disabled by a Reset or STOP Mode Recovery. This set-
ting is the default for unprogrammed (erased) Flash.
Reserved—Must be 1
VBO_AO—Voltage Brown-Out Protection Always On
0 = Voltage Brown-Out Protection is disabled in STOP mode to reduce total power con-
sumption.
1 = Voltage Brown-Out Protection is always enabled including during STOP mode. This
setting is the default for unprogrammed (erased) Flash.
FRP—Flash Read Protect
0 = User program code is inaccessible. Limited control features are available through the
On-Chip Debugger.
1 = User program code is accessible. All On-Chip Debugger commands are enabled. This
setting is the default for unprogrammed (erased) Flash.
Reserved—Must be 1.
FWP—Flash Write Protect
This Option Bit provides Flash Program Memory protection:
0 = Programming and erasure disabled for all of Flash Program Memory. Programming,
Page Erase, and Mass Erase through User Code is disabled. Mass Erase is available using
the On-Chip Debugger.
1 = Programming, Page Erase, and Mass Erase are enabled for all of Flash Program Mem-
ory.
Table 87. Flash Option Bits at Program Memory Address 0000H
R/W
U
6
R/W
U
5
Reserved
P R E L I M I N A R Y
Program Memory 0000H
R/W
U
4
VBO_AO
R/W
U
3
Z8 Encore!
FRP
R/W
U
2
Product Specification
Reserved
®
R/W
U
1
Z8F0823 Series
Flash Option Bits
FWP
R/W
U
0
135