ST7FLITE29F1B6 STMicroelectronics, ST7FLITE29F1B6 Datasheet - Page 171
![IC MCU 8BIT 8K FLASH 20-DIP](/photos/6/89/68911/497-20-dip__300_mil__narrow_pdip_mdip__series_sml.jpg)
ST7FLITE29F1B6
Manufacturer Part Number
ST7FLITE29F1B6
Description
IC MCU 8BIT 8K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE29F1B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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9.1.10 LITE AUTO-RELOAD TIMER (LART)
This software library consists of the following functions for LART.
Function Name
Function Prototype
Behaviour Description
Input Parameter
Output Parameters
Required Preconditions
Functions called
Postconditions
See also
LART_Init
Void LART_Init(Lart_InitParameter InitValue)
Initialization of the LART, by default counter clock is OFF
and interrupts disabled. To change this default configura-
tion, you can pass one or more input parameters by logi-
cally ORing them together.
LART_COUNTER_CLK_FLT
sets counter clock = f
LART_COUNTER_CLK_FCPU
sets counter clock = f
LART_OVF_IT_ENABLE
enables overflow interrupt
LART_OCMP_IT_ENABLE
enables compare interrupt
LART_DEFAULT
sets default configuration
None
None
None
LART is configured as desired
None
LTIMER
CPU
Function Descriptions
171/235
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