ST7FLITE29F1B6 STMicroelectronics, ST7FLITE29F1B6 Datasheet - Page 192
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ST7FLITE29F1B6
Manufacturer Part Number
ST7FLITE29F1B6
Description
IC MCU 8BIT 8K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE29F1B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Function Descriptions
9.1.12 WDG
Table 140. WDG_Refresh
Notes:
– This function takes less ROM area but you must pass a precalculated Watchdog counter val-
– To prevent the Watchdog reset this routine must be called when:
– The Watchdog for the ST7FLITE0 device is integrated with the Lite Timer peripheral.
– Functions for that watchdog are integrated with the Lite Timer library functions.
192/235
Function Name
Function Prototype
Behaviour Description
Input Parameter
Output Parameter
Required Preconditions
Functions called
Postconditions
ue.
1. The Watchdog counter value is greater than 0x3F
2. and lower than the Window register for Window Watchdog.
1) This condition is valid only for Window Watchdog
WDG_Refresh
Void WDG_Refresh (unsigned char Counter_Data)
Loads the value of Watchdog counter and activates the
Watchdog.
Counter_Data
Value which is loaded in the Watchdog counter. This value
must be between 0x40 and 0x7f to avoid an immediate re-
set.
To get an immediate reset this value can be between 0x00
to 0x3f.
None
You must precalculate the value of Counter_Data for the
desired Watchdog timeout.
None
1. The Watchdog is activated after this function and can
not be disabled, except by a reset.
2. A Reset is generated after the desired Timeout, when
Watchdog counter rolls over from 0x40 to 0x3f (See
141
Watchdog Timeout).
3. For window watchdog, a reset is also generated if this
routine is called when the Watchdog counter value is
greater than the Window register value
for some Counter_Data values and corresponding
1)
.
Table
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