ST7FLITE29F1B6 STMicroelectronics, ST7FLITE29F1B6 Datasheet - Page 195
![IC MCU 8BIT 8K FLASH 20-DIP](/photos/6/89/68911/497-20-dip__300_mil__narrow_pdip_mdip__series_sml.jpg)
ST7FLITE29F1B6
Manufacturer Part Number
ST7FLITE29F1B6
Description
IC MCU 8BIT 8K FLASH 20-DIP
Manufacturer
STMicroelectronics
Series
ST7r
Specifications of ST7FLITE29F1B6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Processor Series
ST7FLITE2x
Core
ST7
Data Bus Width
8 bit
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7MDT10-DVP3, ST7MDT10-EMU3, STX-RLINK
For Use With
497-5858 - EVAL BOARD PLAYBACK ST7FLITE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- Current page: 195 of 235
- Download datasheet (2Mb)
EXAMPLE:
The following C program shows the use of the WDG library functions.
Program description:
This program generates the watchdog reset for ST72F521 device. The reset timeout period is
configured as 34ms with fosc2 = 8MHz, through function WDG_Refresh with input parameter
“Counter_Data” as 0x50 (See
Watchdog reset timeout can also be configured through WDG_ComputeTimeout function
(refer to the example below). Here it is configured for a reset timeout of 20,000µs with input
parameter WDG_Timeout given as 20,000.
In Window Watchdog, the reset can be generated by reloading the WDG counter register out-
side the Window. In the example it is generated after 1ms
/******************************** Program Start **********************************/
#include "ST7lib_config.h"
void main(void);
void main (void)
{
}
unsigned int i;
/*-----------------------------------------------------------------------------
-----------------------------------------------------------------------------*/
WDG_Refresh (0x50);
/*-----------------------------------------------------------------------------
-----------------------------------------------------------------------------*/
/*WDG_ComputeTimeout (50000); */
/*----------------------------------------------------------------------------
-----------------------------------------------------------------------------*/
#ifdef WDG_72F561
WDG_Refresh(0x50) ;
WDG_WriteWindow(0x48)
for (i = 0; i < 532; i++) ;
WDG_Refresh(0x50);
#endif
while (1);
WDG_Refresh function to generate a reset after 34ms at fosc2 = 8MHz
WDG_ComputeTimeout function to generate a reset after 20ms (MCC timebase:
4ms, fosc2 = 8MHz)
Window
18.432ms at fosc2 = 8MHz. Reset is generated after 1ms by reloading the WDG
counter register outside the window.
Watchdog for setting a Refresh Period of 34ms and a Window Size of
Table
141).
/* Generates Reset on execution of this routine */
/* Set a Refresh period of 34ms */
/*Generates reset after 34ms*/
/*Generates reset after 20ms*/
Function Descriptions
/*1ms delay */
195/235
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