Z86E3016VSG Zilog, Z86E3016VSG Datasheet - Page 28

• Manufacturer Part Number: Z86E3016VSG
• Description: IC MICROCONTROLLER 4K 28-PLCC
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E3016VSG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 16MHz
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: OTP
• Ram Size: 237 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-PLCC
• Processor Series: Z86E3xx
• Core: Z8
• Data Bus Width: 8 bit
• Data Ram Size: 237 B
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 2
• Operating Supply Voltage: 3.5 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: Z86CCP01ZEM, Z86CCP00ZAC, Z86C3000ZAC
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

PIN FUNCTIONS (Continued)
Z86E30/E31/E40
Z8 4K OTP Microcontroller
Port 3 (P37–P30). Port 3 is an 8-bit, CMOS-compatible
port with four fixed inputs (P33–P30) and four fixed outputs
(P37–P34). These eight lines can be configured by soft-
ware for interrupt and handshake control functions. Port 3,
Pin 0 is Schmitt- triggered. P31, P32, and P33 are stan-
dard CMOS inputs with single trip point (no Auto Latches)
and P34, P35, P36, and P37 are push-pull output lines.
Low EMI output buffers can be globally programmed by
the software. Two on-board comparators can process an-
alog signals on P31 and P32 with reference to the voltage
on P33. The analog function is enabled by setting the D1
of Port 3 Mode Register (P3M). The comparator output can
be outputted from P34 and P37, respectively, by setting
PCON register Bit D0 to 1 state. For the interrupt function,
P30 and P33 are falling edge triggered interrupt inputs.
P31 and P32 can be programmed as falling, rising or both
edges triggered interrupt inputs (Figure 21). Access to
Counter/Timer 1 is made through P31 (T
(T
also available on Port 3 (Table 9).
28
OUT
). Handshake lines for Port 0, Port 1, and Port 2 are
IN
) and P36
P R E L I M I N A R Y
Note: When enabling/ or disabling analog mode, the fol-
lowing is recommended:
1. Allow two NOP delays before reading this comparator
2. Disable global interrupts, switch to analog mode, clear
3. IRQ register bits 3 to 0 must be cleared after enabling
Note: P33–P30 differs from the Z86C30/C31/C40 in that
there is no clamping diode to V
voltage circuits. Exceeding the V
during standard operating mode may cause the device to
enter EPROM mode.
output.
interrupts, and then re-enable interrupts.
analog mode.
CC
IH
due to the EPROM high-
maximum specification
DS97Z8X0502
Zilog