Z8F6421AN020EC00TR Zilog, Z8F6421AN020EC00TR Datasheet - Page 118

• Manufacturer Part Number: Z8F6421AN020EC00TR
• Description: IC ENCORE MCU FLASH 64K 44LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F6421AN020EC00TR

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LQFP
• For Use With: 269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: Z8F6421AN020EC00T

PS019921-0308
Receiving Data using the Interrupt-Driven Method
ditions). Follow the steps below to configure the UART receiver for interrupt-driven oper-
ation:
1. Write to the UART Baud Rate High and Low Byte registers to set the desired baud
2. Enable the UART pin functions by configuring the associated GPIO Port pins for
3. Execute a
4. Write to the Interrupt control registers to enable the UART Receiver interrupt and set
5. Clear the UART Receiver interrupt in the applicable Interrupt Request register.
6. Write to the UART Control 1 Register to enable MULTIPROCESSOR (9-bit) mode
7. Write the device address to the Address Compare Register (automatic multiprocessor
8. Write to the UART Control 0 register to:
9. Execute an
The UART is now configured for interrupt-driven data reception. When the UART
Receiver interrupt is detected, the associated interrupt service routine performs the follow-
ing:
1. Check the UART Status 0 register to determine the source of the interrupt - error,
2. If the interrupt was caused by data available, read the data from the UART Receive
The UART Receiver interrupt indicates the availability of new data (as well as error con-
rate.
alternate function operation.
the desired priority.
functions, if desired.
–
–
–
modes only).
–
–
break, or received data.
Data register. If operating in MULTIPROCESSOR (9-bit) mode, further actions may
be required depending on the MULTIPROCESSOR Mode bits
Set the MULTIPROCESSOR Mode Select (MPEN) to Enable
MULTIPROCESSOR mode.
Set the MULTIPROCESSOR Mode Bits, MPMD[1:0], to select the desired
address matching scheme.
Configure the UART to interrupt on received data and errors or errors only
(interrupt on errors only is unlikely to be useful for Z8 Encore! XP devices
without a DMA block).
Set the receive enable bit (REN) to enable the UART for data reception.
Enable parity, if desired and if MULTIPROCESSOR mode is not enabled, and
select either even or odd parity.
DI
EI
instruction to disable interrupts.
instruction to enable interrupts.
Z8 Encore! XP
Product Specification
MPMD[1:0]
®
F64XX Series
.
UART
104