Z16F2810FI20EG Zilog, Z16F2810FI20EG Datasheet - Page 145

• Manufacturer Part Number: Z16F2810FI20EG
• Description: IC ZNEO MCU FLASH 128K 80QFP
• Manufacturer: Zilog
• Series: Encore!® ZNEOr

Specifications of Z16F2810FI20EG

• Core Processor: ZNEO
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 80-BQFP
• Data Bus Width: 16 bit
• Data Ram Size: 4 B
• Interface Type: ESPI, I2C, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 60
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: 770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Table 75. PWM Fault Status Register (PWMFSTAT)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
Bit Position
[7]
RLDFlag
[6]
Reserved
[5]
DBGFLAG
[4:3]
Reserved
[2]
F1FLAG
[1]
C0FLAG
[0]
FFLAG
Note: For this register, W1C means you must write one to clear the flag.
PWM Fault Status Register
RLDFlag
R/W1C
Value (H) Description
U
The PWM fault status (PWMFSTAT) register provides status of fault inputs and timer
reload. The fault flags indicate the fault source, which is active. If a fault source is masked,
the flag in this register is not set when the source is asserted. The reload flag is set when
the timer compare values are updated. Clear flags by writing 1 to the flag bits. Fault flag
bits are cleared only if the associated fault source has deasserted.
7
0
0
Reserved DBGFLAG
R
Reload Flag
This bit is set and latched when a PWM timer reload occurs. Writing a 1
to this bit clears the flag.
Reserved
Always reads 0.
Debug Flag
This bit is set and latched when DEBUG mode is entered. Writing a
1 to this bit clears the flag.
Reserved
Always reads 0.
Fault1 Flag
This bit is set and latched when fault1 is asserted. Writing a 1
to this bit clears the flag.
Comparator 0 Flag
This bit is set and latched when comparator is asserted. Writing a
1 to this bit clears the flag.
Fault Flag
This bit is set and latched when the fault0 input is asserted. Writing a 1
6
0
to this bit clears the flag.
R/W1C
U
5
P R E L I M I N A R Y
4
FF_E385H
Reserved
00
R
3
F1FLAG
R/W1C
U
2
Multi-Channel PWM Timer
Product Specification
ZNEO
C0FLAG
R/W1C
U
1
Z16F Series
FFLAG
R/W1C
U
0
130