ST10F269-DP STMicroelectronics, ST10F269-DP Datasheet - Page 106

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ST10F269-DP

Manufacturer Part Number
ST10F269-DP
Description
MCU 16BIT 256K FLASH 144PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F269-DP

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-BFQFP
Processor Series
ST10F26x
Core
ST10
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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ST10F269
The PONR flag of WDTCON register is set if the output voltage of the internal 3.3V supply falls below the
threshold (typically 2V) of the power-on detection circuit. This circuit is efficient to detect major failures of
the external 5V supply but if the internal 3.3V supply does not drop under 2 volts, the PONR flag is not
set. This could be the case on fast switch-off / switch-on of the 5V supply. The time needed for such a
sequence to activate the PONR flag depends on the value of the capacitors connected to the supply and
on the exact value of the internal threshold of the detection circuit.
Table 26 : WDTCON Bit Value on Different Resets
Notes: 1. PONR bit may not be set for short supply failure.
In case of bi-directional reset is enabled, and if the RSTIN pin is latched low after the end of the internal
reset sequence, then a Short hardware reset, a software reset or a watchdog reset will trigger a Long
hardware reset. Thus, Reset Indications flags will be set to indicate a Long Hardware Reset.
The Watchdog Timer is 16-bit, clocked with the system clock divided by 2 or 128. The high Byte of the
watchdog timer register can be set to a pre-specified reload value (stored in WDTREL).
Each time it is serviced by the application software, the high byte of the watchdog timer is reloaded. For
security, rewrite WDTCON each time before the watchdog timer is serviced
The Table 27 shows the watchdog time range for 40MHz CPU clock.
Table 27 : WDTREL Reload Value
The watchdog timer period is calculated with the following formula:
106/160
P
Power On Reset
Power on after partial supply failure
Long Hardware Reset
Short Hardware Reset
Software Reset
Watchdog Reset
WD T
2. For power-on reset and reset after supply partial failure, asynchronous reset must be used.
Reload value in WDTREL
=
-------------- -
f CPU
Reset Source
1
FFh
00h
512
1
+
W DTIN
PONR
1) 2)
X
63
2 (WDTIN = ‘0’)
3.276ms
12.8 s
256
LHWR
X
X
X
W DTREL
Prescaler for f
SHWR
X
X
X
X
CPU
= 40MHz
128 (WDTIN = ‘1’)
SWR
X
X
X
X
X
X
819.2ms
209.7ms
WDTR
X

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