ST10F269-DP STMicroelectronics, ST10F269-DP Datasheet - Page 155

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ST10F269-DP

Manufacturer Part Number
ST10F269-DP
Description
MCU 16BIT 256K FLASH 144PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F269-DP

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
144-BFQFP
Processor Series
ST10F26x
Core
ST10
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
No

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21.4.13 - External Bus Arbitration
V
Note: 1. Partially tested, guaranteed by design characterization.
Figure 79 : External Bus Arbitration (Releasing the Bus)
Notes: 1. The ST10F269 will complete the currently running bus cycle before granting bus access.
t
t
t
t
t
t
t
61
62
63
64
65
66
67
DD
Symbol
= 5V
CLKOUT
HOLD
HLDA
BREQ
CSx
(P6.x)
Others
2. This is the first possibility for BREQ to become active.
3. The CS outputs will be resistive high (pull-up) after
SR
CC
CC
CC
CC
CC
CC
10%, V
HOLD input setup time
to CLKOUT
CLKOUT to HLDA high
or BREQ low delay
CLKOUT to HLDA low
or BREQ high delay
CSx release
CSx drive
Other signals release
Other signals drive
SS
= 0V, T
Parameter
t
61
A
= -40 to +125°C, C
1)
1)
1
1
Minimum
Maximum CPU Clock
t
64
.
15
-4
-4
L
= 50pF
= 40 MHz
t
66
t
63
Maximum
12.5
12.5
15
15
15
15
t
t
62
64
3)
2)
Minimum
1/2TCL = 1 to 40 MHz
Variable CPU Clock
15
-4
-4
Maximum
12.5
12.5
15
15
15
15
ST10F269
155/160
ns
ns
ns
ns
ns
ns
ns

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