MC9S08QG84CDNE Freescale Semiconductor, MC9S08QG84CDNE Datasheet - Page 270

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MC9S08QG84CDNE

Manufacturer Part Number
MC9S08QG84CDNE
Description
IC MCU 8BIT B54 RATING 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08QG84CDNE

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
12
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
DEMO9S08QG8E - BOARD DEMO FOR MC9S08QG8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S08QG84CDNE
Manufacturer:
Freescale Semiconductor
Quantity:
135
Appendix A Electrical Characteristics
A.4
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
268
ESD Protection and Latch-Up Immunity
1
Latch-up
Machine
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Model
Human
Body
No.
1
2
3
4
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Human body model (HBM)
Machine model (MM)
Charge device model (CDM)
Latch-up current at T
Table A-4. ESD and Latch-Up Protection Characteristics
Table A-3. ESD and Latch-up Test Conditions
MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 5
Description
Rating
1
A
= 125°C
Symbol
Symbol
V
V
V
I
R1
R1
HBM
CDM
LAT
C
C
MM
± 2000
± 200
± 500
± 100
Min
Value
1500
– 2.5
100
200
7.5
3
0
3
Max
Freescale Semiconductor
Unit
Unit
mA
pF
pF
Ω
Ω
V
V
V
V
V

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