MC9S08QE4CTGR Freescale Semiconductor, MC9S08QE4CTGR Datasheet - Page 10

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MC9S08QE4CTGR

Manufacturer Part Number
MC9S08QE4CTGR
Description
MCU 8BIT 4K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08QE4CTGR

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Quantity
Price
Part Number:
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Quantity:
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Part Number:
MC9S08QE4CTGR
Manufacturer:
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Quantity:
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Electrical Characteristics
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
P
solving
3.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions must be taken to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification, ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless instructed otherwise in the device
specification.
10
D
(at equilibrium) for a known T
Equation 1
ESD Protection and Latch-Up Immunity
1
Latch-up
Machine
Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Model
Human
Body
No.
1
2
3
4
and
Series resistance
Storage capacitance
Number of pulses per pin
Series resistance
Storage capacitance
Number of pulses per pin
Minimum input voltage limit
Maximum input voltage limit
Human body model (HBM)
Machine model (MM)
Charge device model (CDM)
Latch-up current at T
Equation 2
Table 6. ESD and Latch-Up Protection Characteristics
Table 5. ESD and Latch-up Test Conditions
Description
Rating
A
iteratively for any value of T
. Using this value of K, the values of P
MC9S08QE8 Series Data Sheet, Rev. 8
1
A
= 85 C
Symbol
Symbol
V
V
V
I
R1
R1
HBM
CDM
LAT
C
C
MM
A
.
2000
200
500
100
Min
Value
1500
–2.5
100
200
7.5
D
3
0
3
and T
Max
J
can be obtained by
Freescale Semiconductor
Unit
Unit
mA
pF
pF
V
V
V
V
V

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