MC9S08QE4CTGR Freescale Semiconductor, MC9S08QE4CTGR Datasheet - Page 20

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MC9S08QE4CTGR

Manufacturer Part Number
MC9S08QE4CTGR
Description
MCU 8BIT 4K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08QE4CTGR

Core Processor
HCS08
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, PWM, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Electrical Characteristics
3.10
This section describes timing characteristics for each peripheral system.
3.10.1
20
1
2
3
4
5
Num
Typical values are based on characterization data at V
This is the shortest pulse that is guaranteed to be recognized as a reset pin request.
To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time of t
rises above V
This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized.
Timing is shown with respect to 20% V
10
1
2
3
4
5
6
8
7
9
C
D
D
D
D
D
D
D
C
D
C
AC Characteristics
Control Timing
Bus frequency (t
Internal low power oscillator period
External reset pulse width
Reset low drive
BKGD/MS setup time after issuing background debug
force reset to enter user or BDM modes
BKGD/MS hold time after issuing background debug
force reset to enter user or BDM modes
IRQ pulse width
Keyboard interrupt pulse width
Port rise and fall time —
Low output drive (PTxDS = 0) (load = 50 pF)
Port rise and fall time —
High output drive (PTxDS = 1) (load = 50 pF)
Voltage regulator recovery time
Asynchronous path
Synchronous path
Asynchronous path
Synchronous path
LVD
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
Slew rate control enabled (PTxSE = 1)
Slew rate control disabled (PTxSE = 0)
.
RESET PIN
cyc
= 1/f
4
4
2
2
Rating
Bus
2
DD
)
MC9S08QE8 Series Data Sheet, Rev. 8
and 80% V
Table 12. Control Timing
Figure 15. Reset Timing
3
DD
DD
5
levels. Temperature range –40C to 85C.
5
= 3.0 V, 25 C unless otherwise stated.
t
extrst
t
t
t
t
Symbol
ILIH,
ILIH,
Rise
Rise
t
t
t
MSSU
t
t
t
rstdrv
f
extrst
MSH
VRR
LPO
Bus
, t
, t
t
t
IHIL
IHIL
Fall
Fall
1.5  t
1.5  t
34  t
Min
700
100
500
100
100
100
dc
cyc
cyc
cyc
Typical
16
23
5
9
4
Freescale Semiconductor
1
1300
Max
10
MSH
after V
Unit
MHz
s
ns
ns
ns
s
ns
ns
ns
ns
s
DD

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