MC908QY4ACDTER Freescale Semiconductor, MC908QY4ACDTER Datasheet - Page 91
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MC908QY4ACDTER
Manufacturer Part Number
MC908QY4ACDTER
Description
MCU 8BIT 4K FLASH W/ADC 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QT1ACDWE.pdf
(200 pages)
Specifications of MC908QY4ACDTER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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- Download datasheet (2Mb)
10.4 LVI Interrupts
The LVI module does not generate interrupt requests.
10.5 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-consumption standby modes.
10.5.1 Wait Mode
If enabled, the LVI module remains active in wait mode. If enabled to generate resets, the LVI module can
generate a reset and bring the MCU out of wait mode.
10.5.2 Stop Mode
If the LVIPWRD bit in the configuration register is cleared and the LVISTOP bit in the configuration
register is set, the LVI module remains active. If enabled to generate resets, the LVI module can generate
a reset and bring the MCU out of stop mode.
10.6 Registers
The LVI status register (LVISR) contains a status bit that is useful when the LVI is enabled and LVI reset
is disabled.
LVIOUT — LVI Output Bit
Freescale Semiconductor
This read-only flag becomes set when the V
when V
DD
voltage rises above V
Reset:
Read:
Write:
LVIOUT
Bit 7
0
= Unimplemented
Figure 10-2. LVI Status Register (LVISR)
V
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
TRIPF
6
0
0
V
Table 10-1. LVIOUT Bit Indication
V
TRIPR
DD
DD
< V
V
> V
< V
DD
DD
. (See
TRIPR
TRIPF
5
0
0
< V
TRIPR
DD
Table
voltage falls below the V
4
0
0
10-1).
Previous value
R
3
0
0
LVIOUT
0
1
= Reserved
2
0
0
TRIPF
1
0
0
trip voltage and is cleared
Bit 0
R
0
LVI Interrupts
91
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