MC9S08SH16CTL Freescale Semiconductor, MC9S08SH16CTL Datasheet - Page 82

• Manufacturer Part Number: MC9S08SH16CTL
• Description: MCU 8BIT 16K FLASH 28-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08SH16CTL

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-TSSOP
• Processor Series: S08SH
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Operating Supply Voltage: 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• Package: 28TSSOP
• Family Name: HCS08
• Maximum Speed: 40 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 6 Parallel Input/Output Control
6.6.1.4
6.6.1.5
82
PTASE[4:0]
PTADS[4:0]
Reserved
Reserved
Reset:
Reset:
Field
Field
4:0
4:0
5
5
W
W
R
R
Reserved Bits — These bits are unused on this MCU, writes have no affect and could read as 1s or 0s.
Output Slew Rate Enable for Port A Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port A bit n.
1 Output slew rate control enabled for port A bit n.
Reserved Bits — These bits are unused on this MCU, writes have no affect and could read as 1s or 0s.
Output Drive Strength Selection for Port A Bits — Each of these control bits selects between low and high
output drive for the associated PTA pin. For port A pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port A bit n.
1 High output drive strength selected for port A bit n.
Port A Slew Rate Enable Register (PTASE)
0
0
Port A Drive Strength Selection Register (PTADS)
0
0
7
7
Figure 6-7. Drive Strength Selection for Port A Register (PTADS)
Figure 6-6. Slew Rate Enable for Port A Register (PTASE)
0
0
0
0
6
6
Table 6-5. PTASE Register Field Descriptions
Table 6-6. PTADS Register Field Descriptions
MC9S08SH8 MCU Series Data Sheet, Rev. 3
R
R
0
0
5
5
PTADS4
PTASE4
0
0
4
4
Description
Description
PTADS3
PTASE3
3
0
3
0
PTASE2
PTADS2
0
0
2
2
PTASE1
PTADS1
Freescale Semiconductor
0
0
1
1
PTASE0
PTADS0
0
0
0
0