MC9S08SH8CTJ Freescale Semiconductor, MC9S08SH8CTJ Datasheet - Page 85
![IC MCU 8BIT 8K FLASH 20-TSSOP](/photos/12/34/123427/mc9s08sh8ctj_sml.jpg)
MC9S08SH8CTJ
Manufacturer Part Number
MC9S08SH8CTJ
Description
IC MCU 8BIT 8K FLASH 20-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08SH4CTJ.pdf
(338 pages)
Specifications of MC9S08SH8CTJ
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
17
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-TSSOP
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI/SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
17
Number Of Timers
3
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
On-chip Adc
12-ch x 10-bit
For Use With
DEMO9S08SH8 - BOARD DEMO FOR MC9S08SH FAM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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6.6.2
Port B is controlled by the registers listed below.
6.6.2.1
6.6.2.2
Freescale Semiconductor
PTBDD[7:0]
PTBD[7:0]
Reset:
Reset:
Field
Field
7:0
7:0
W
W
R
R
PTBDD7
PTBD7
Port B Registers
Port B Data Register Bits — For port B pins that are inputs, reads return the logic level on the pin. For port B
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port B pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTBD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
Data Direction for Port B Bits — These read/write bits control the direction of port B pins and what is read for
PTBD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port B bit n and PTBD reads return the contents of PTBDn.
Port B Data Register (PTBD)
0
Port B Data Direction Register (PTBDD)
0
7
7
PTBDD6
PTBD6
0
0
6
6
Figure 6-12. Port B Data Direction Register (PTBDD)
Table 6-11. PTBDD Register Field Descriptions
Table 6-10. PTBD Register Field Descriptions
Figure 6-11. Port B Data Register (PTBD)
MC9S08SH8 MCU Series Data Sheet, Rev. 3
PTBDD5
PTBD5
0
0
5
5
PTBDD4
PTBD4
0
0
4
4
Description
Description
PTBDD3
PTBD3
3
0
3
0
PTBDD2
PTBD2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTBDD1
PTBD1
0
0
1
1
PTBDD0
PTBD0
0
0
0
0
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