S9S08AW16AE0MFT Freescale Semiconductor, S9S08AW16AE0MFT Datasheet - Page 100

• Manufacturer Part Number: S9S08AW16AE0MFT
• Description: MCU 16K FLASH AUTO MONET 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08AW16AE0MFT

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SCI, SPI
• Peripherals: LVD. POR, PWM, WDT
• Number Of I /o: 38
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 48-QFN Exposed Pad
• Controller Family/series: HCS08
• No. Of I/o's: 38
• Ram Memory Size: 1KB
• Cpu Speed: 40MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: S08AW
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08AW60E
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Height: 1 mm
• Length: 7 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Chapter 6 Parallel Input/Output
6.7.10
In addition to the I/O control, port E pins are controlled by the registers listed below.
100
PTEDD[7:0]
PTEPE[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
PTEDD7
PTEPE7
Port E Pin Control Registers (PTEPE, PTESE, PTEDS)
Data Direction for Port E Bits — These read/write bits control the direction of port E pins and what is read for
PTED reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port E bit n and PTED reads return the contents of PTEDn.
Internal Pullup Enable for Port E Bits— Each of these control bits determines if the internal pullup device is
enabled for the associated PTE pin. For port E pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port E bit n.
1 Internal pullup device enabled for port E bit n.
0
0
7
7
PTEDD6
PTEPE6
0
0
6
6
Figure 6-32. Internal Pullup Enable for Port E (PTEPE)
Table 6-22. PTEDD Register Field Descriptions
Table 6-23. PTEPE Register Field Descriptions
Figure 6-31. Data Direction for Port E (PTEDD)
PTEDD5
PTEPE5
MC9S08AC16 Series Data Sheet, Rev. 8
0
0
5
5
PTEDD4
PTEPE4
0
0
4
4
Description
Description
PTEDD3
PTEPE3
3
0
3
0
PTEDD2
PTEPE2
0
0
2
2
PTEDD1
PTEPE1
Freescale Semiconductor
0
0
1
1
PTEDD0
PTEPE0
0
0
0
0