MC908QB4CDWE Freescale Semiconductor, MC908QB4CDWE Datasheet - Page 122

IC MCU 8BIT 4K FLASH 16-SOIC

MC908QB4CDWE

Manufacturer Part Number
MC908QB4CDWE
Description
IC MCU 8BIT 4K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908QB4CDWE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QB
Core
HC08
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 10 Channel
Controller Family/series
HC08
No. Of I/o's
14
Ram Memory Size
128Byte
Cpu Speed
8MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Enhanced Serial Communications Interface (ESCI) Module
13.8.1 ESCI Control Register 1
ESCI control register 1 (SCC1):
LOOPS — Loop Mode Select Bit
ENSCI — Enable ESCI Bit
TXINV — Transmit Inversion Bit
M — Mode (Character Length) Bit
122
This read/write bit enables loop mode operation. In loop mode the RxD pin is disconnected from the
ESCI, and the transmitter output goes into the receiver input. Both the transmitter and the receiver
must be enabled to use loop mode.
This read/write bit enables the ESCI and the ESCI baud rate generator. Clearing ENSCI sets the SCTE
and TC bits in ESCI status register 1 and disables transmitter interrupts.
This read/write bit reverses the polarity of transmitted data.
This read/write bit determines whether ESCI characters are eight or nine bits long (see
Table
1 = Loop mode enabled
0 = Normal operation enabled
1 = ESCI enabled
0 = ESCI disabled
1 = Transmitter output inverted
0 = Transmitter output not inverted
1 = 9-bit ESCI characters
0 = 8-bit ESCI characters
Enables loop mode operation
Enables the ESCI
Controls output polarity
Controls character length
Controls ESCI wakeup method
Controls idle character detection
Enables parity function
Controls parity type
13-4).The ninth bit can serve as a receiver wakeup signal or as a parity bit.
Reset:
Read:
Write:
Setting the TXINV bit inverts all transmitted values including idle, break,
start, and stop bits.
LOOPS
Bit 7
0
Figure 13-9. ESCI Control Register 1 (SCC1)
ENSCI
6
0
MC68HC908QB8 Data Sheet, Rev. 3
TXINV
5
0
NOTE
M
0
4
WAKE
3
0
ILTY
2
0
PEN
1
0
Freescale Semiconductor
Bit 0
PTY
0

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