C8051F311-GMR Silicon Laboratories Inc, C8051F311-GMR Datasheet - Page 122

• Manufacturer Part Number: C8051F311-GMR
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F31xr

Specifications of C8051F311-GMR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Package: 24QFN EP
• Device Core: 8051
• Family Name: C8051F31x
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 25
• Interface Type: I2C/SMBus/SPI/UART
• On-chip Adc: 17-chx10-bit
• Number Of Timers: 4
• For Use With: 336-1446 - ADAPTER PROGRAM TOOLSTICK F311336-1253 - DEV KIT FOR C8051F310/F311
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

C8051F310/1/2/3/4/5/6/7
122
Bit7:
Bits 6–0: OSCICL: Internal Oscillator Calibration Register.
Bit7:
Bit6:
Bits5–2: UNUSED. Read = 0000b, Write = don't care.
Bits1–0: IFCN1-0: Internal Oscillator Frequency Control Bits.
IOSCEN
R/W
R/W
Bit7
Bit7
UNUSED. Read = 0. Write = don’t care.
This register determines the internal oscillator period. This reset value for OSCICL deter-
mines the oscillator base frequency. The reset value is factory calibrated to generate an
internal oscillator frequency of 24.5 MHz.
IOSCEN: Internal Oscillator Enable Bit.
0: Internal Oscillator Disabled.
1: Internal Oscillator Enabled.
IFRDY: Internal Oscillator Frequency Ready Flag.
0: Internal Oscillator is not running at programmed frequency.
1: Internal Oscillator is running at programmed frequency.
00: SYSCLK derived from Internal Oscillator divided by 8.
01: SYSCLK derived from Internal Oscillator divided by 4.
10: SYSCLK derived from Internal Oscillator divided by 2.
11: SYSCLK derived from Internal Oscillator divided by 1.
SFR Definition 12.1. OSCICL: Internal Oscillator Calibration
IFRDY
SFR Definition 12.2. OSCICN: Internal Oscillator Control
R/W
Bit6
Bit6
R
R/W
R/W
Bit5
Bit5
R/W
R/W
Bit4
Bit4
Rev. 1.7
R/W
R/W
Bit3
Bit3
R/W
R/W
Bit2
Bit2
IFCN1
R/W
R/W
Bit1
Bit1
IFCN0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
11000000
Reset Value
Variable
0xB3
0xB2