MCF52110CVM80J Freescale Semiconductor, MCF52110CVM80J Datasheet - Page 9

• Manufacturer Part Number: MCF52110CVM80J
• Description: IC MCU 128K FLASH 80MHZ 81MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF521xxr

Specifications of MCF52110CVM80J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 81-MAPBGA
• Processor Series: MCF521x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: M52210DEMO, M52211EVB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Family Configurations
1.2.5
1.2.5.1
The dual-ported SRAM module provides a general-purpose 16-Kbyte memory block that the ColdFire core can access in a
single cycle. The location of the memory block can be set to any 16-Kbyte boundary within the 4-Gbyte address space. This
memory is ideal for storing critical code or data structures and for use as the system stack. Because the SRAM module is
physically connected to the processor's high-speed local bus, it can quickly service core-initiated accesses or
memory-referencing commands from the debug module.
The SRAM module is also accessible by the DMA. The dual-ported nature of the SRAM makes it ideal for implementing
applications with double-buffer schemes, where the processor and a DMA device operate in alternate regions of the SRAM to
maximize system performance.
1.2.5.2
The ColdFire flash module (CFM) is a non-volatile memory (NVM) module that connects to the processor’s high-speed local
bus. The CFM is constructed with up to four banks of 16-Kbyte16-bit flash memory arrays to generate up to 128 Kbytes of
32-bit flash memory. These electrically erasable and programmable arrays serve as non-volatile program and data memory. The
flash memory is ideal for program and data storage for single-chip applications, allowing for field reprogramming without
requiring an external high voltage source. The CFM interfaces to the ColdFire core through an optimized read-only memory
controller that supports interleaved accesses from the 2-cycle flash memory arrays. A backdoor mapping of the flash memory
is used for all program, erase, and verify operations, as well as providing a read datapath for the DMA. Flash memory may also
be programmed via the EzPort, which is a serial flash memory programming interface that allows the flash memory to be read,
erased and programmed by an external controller in a format compatible with most SPI bus flash memory chips.
1.2.6
The device incorporates several low-power modes of operation entered under program control and exited by several external
trigger events. An integrated power-on reset (POR) circuit monitors the input supply and forces an MCU reset as the supply
voltage rises. The low voltage detector (LVD) monitors the supply voltage and is configurable to force a reset or interrupt
condition if it falls below the LVD trip point. The RAM standby switch provides power to RAM when the supply voltage to the
chip falls below the standby battery voltage. The peripheral clocks may be controlled on an individual basis for power reduction.
1.2.7
The device has three full-duplex UARTs that function independently. The three UARTs can be clocked by the system bus clock,
eliminating the need for an external clock source. On smaller packages, the third UART is multiplexed with other digital I/O
functions. The UARTs are capable of generating DMA requests as well as interrupts.
1.2.8
The processor includes two I
a simple, efficient method of data exchange and minimizes the interconnection between devices. This bus is suitable for
applications requiring occasional communications over a short distance between many devices.
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Bypass the device for a given circuit board test by effectively reducing the boundary-scan register to a single bit
Disable the output drive to pins during circuit-board testing
Drive output pins to stable levels
On-Chip Memories
Power Management
UARTs
I
2
SRAM
Flash Memory
C Bus
2
C modules. The I
MCF52110 ColdFire Microcontroller, Rev. 1
2
C bus is an industry-standard, two-wire, bidirectional serial bus that provides
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