MC9S08RG32FGE Freescale Semiconductor, MC9S08RG32FGE Datasheet - Page 83

• Manufacturer Part Number: MC9S08RG32FGE
• Description: IC MCU 32K FLASH 8MHZ 44-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RG32FGE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: S08RG
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08RG60E
• Minimum Operating Temperature: 0 C
• Controller Family/series: HCS08
• No. Of I/o's: 39
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
PTDDD[6:0]
PTDPE[6:0]
Field
Field
6:0
6:0
Reset
Reset
W
W
R
R
Pullup Enable for Port D Bits — For port D pins that are inputs, these read/write control bits determine whether
internal pullup devices are enabled. For port D pins that are configured as outputs, these bits are ignored and
the internal pullup devices are disabled.
0 Internal pullup device disabled.
1 Internal pullup device enabled.
Data Direction for Port D Bits — These read/write bits control the direction of port D pins and what is read for
PTDD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port D bit n and PTDD reads return the contents of PTDDn.
0
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
PTDDD6
PTDPE6
6
0
6
0
Figure 6-17. Data Direction for Port D (PTDDD)
Figure 6-16. Pullup Enable for Port D (PTDPE)
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Table 6-12. PTDDD Field Descriptions
Table 6-11. PTDPE Field Descriptions
PTDDD5
PTDPE5
0
0
5
5
PTDDD4
PTDPE4
4
0
4
0
Description
Description
PTDDD3
PTDPE3
0
0
3
3
PTDDD2
PTDPE2
2
0
2
0
PTDDD1
PTDPE1
0
0
1
1
Parallel Input/Output
PTDDD0
PTDPE0
0
0
0
0
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