MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 258
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MC908GR16VFAE
Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Specifications of MC908GR16VFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR16VFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Electrical Specifications
258
10. If minimum V
Monitor mode entry voltage
Low-voltage inhibit, trip falling voltage
Low-voltage inhibit, trip rising voltage
Low-voltage inhibit reset/recover hysteresis
POR rearm voltage
POR reset voltage
POR rise time ramp rate
1. V
2. Typical values reflect average measurements at midpoint of voltage range, 25°C only.
3. Run (operating) I
4. Wait I
5. Stop I
6. Stop I
7. Pullups and pulldowns are disabled.
8. Maximum is highest voltage that POR is guaranteed.
9. Maximum is highest voltage that POR is possible.
(V
loads. Less than 100 pF on all outputs. C
affects run I
than 100 pF on all outputs. C
Measured with CGM and LVI enabled.
rail. No dc loads. Less than 100 pF on all outputs. All inputs configured as inputs.
V
TRIPF
DD
DD
is reached.
= 3.3 Vdc ± 10%, V
DD
DD
DD
+ V
measured using external square wave clock source (f
with TBM enabled is measured using an external square wave clock source (f
is measured with OSC1 = V
HYS
DD
DD
. Measured with all modules enabled.
= V
(9)
(8)
is not reached before the internal POR reset is released, RST must be driven low externally until minimum
DD
Characteristic
TRIPR
measured using external square wave clock source (f
(10)
)
SS
= 0 Vdc, T
L
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly affects wait I
(1)
SS
A
MC68HC908GR16 Data Sheet, Rev. 4.0
= T
.
L
A
= 20 pF on OSC2. All ports configured as inputs. OSC2 capacitance linearly
(min) to T
A
(max), unless otherwise noted
V
Symbol
V
V
PORRST
R
V
V
V
TRIPR
TRIPF
OSC
POR
POR
HYS
TST
= 16 MHz). All inputs 0.2 V from rail. No dc loads. Less
V
OSC
DD
0.035
2.35
Min
2.4
—
0
0
+ 2.5
= 16 MHz). All inputs 0.2 V from rail. No dc
OSC
Typ
2.66
100
700
2.6
—
—
—
= 16 MHz). All inputs 0.2 V from
(2)
Freescale Semiconductor
V
DD
Max
100
800
2.7
2.8
—
—
+ 4.0
V/ms
Unit
mV
mV
mV
V
V
V
DD
.
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