MC908GR32ACFAER Freescale Semiconductor, MC908GR32ACFAER Datasheet - Page 133

• Manufacturer Part Number: MC908GR32ACFAER
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR32ACFAER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1.5KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Freescale Semiconductor
Port
Addr.
$0440
$0441
$0444
$0445
A
B
Bit
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Data Direction Register G
Data Direction Register F
Register Name
DDRA0
DDRA1
DDRA2
DDRA3
DDRA4
DDRA5
DDRA6
DDRA7
DDRB0
DDRB1
DDRB2
DDRB3
DDRB4
DDRB5
DDRB6
DDRB7
Port G Data Register
Port F Data Register
DDR
See page 147.
See page 149.
See page 148.
See page 150.
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
(DDRG)
(DDRF)
(PTG)
(PTF)
KBD
ADC
Figure 12-1. I/O Port Register Summary (Sheet 3 of 3)
Table 12-1. Port Control Register Bits Summary
Module Control
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
ADCH4–ADCH0
DDRG7
DDRF7
PTG7
PTF7
Bit 7
0
0
KBIE0
KBIE1
KBIE2
KBIE3
KBIE4
KBIE5
KBIE6
KBIE7
= Unimplemented
DDRG6
DDRF6
PTG6
PTF6
6
0
0
ADC[15:8]
DDRG5
DDRF5
PTG5
PTF5
—
5
0
0
Module Control
DDRG4
DDRF4
Unaffected by reset
Unaffected by reset
PTG4
PTF4
4
0
0
ADCH4–ADCH0
DDRG3
—
DDRF3
PTAF3
PTG3
3
0
0
DDRG2
DDRF2
PTG2
PTF2
2
0
0
Unused Pin Termination
Continued on next page
PTA2/KBD2/AD10
PTA3/KBD3/AD11
PTA4/KBD4/AD12
PTA5/KBD5/AD13
PTA6/KBD6/AD14
PTA7/KBD7/AD15
PTA0/KBD0/AD8
PTA1/KBD1/AD9
DDRG1
PTB0/AD0
PTB1/AD1
PTB2/AD2
PTB3/AD3
PTB4/AD4
PTB5/AD5
PTB6/AD6
PTB7/AD7
DDRF1
PTG1
PTF1
1
0
0
Pin
DDRG0
DDRF0
PTG0
PTF0
Bit 0
0
0
133