MC908GR32ACFAER Freescale Semiconductor, MC908GR32ACFAER Datasheet - Page 50
![IC MCU 32K FLASH 8MHZ 48-LQFP](/photos/39/61/396123/4734654_sml.jpg)
MC908GR32ACFAER
Manufacturer Part Number
MC908GR32ACFAER
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR32ACFJE.pdf
(314 pages)
Specifications of MC908GR32ACFAER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1.5KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR32ACFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Memory
2.7 FLASH-2 Memory (FLASH-2)
This subsection describes the operation of the embedded FLASH-2 memory. This memory can be read,
programmed, and erased from a single external supply. The program and erase operations are enabled
through the use of an internal charge pump.
2.7.1 Functional Description
The FLASH-2 memory is a non-continuous array consisting of a total of 29,822 bytes. An erased bit reads
as a 1 and a programmed bit reads as a 0.
Memory in the FLASH-2 array is organized into rows within pages. There are two rows of memory per
page with 64 bytes per row. The minimum erase block size is a single page,128 bytes. Programming is
performed on a per-row basis, 64 bytes at a time. Program and erase operations are facilitated through
control bits in the FLASH-2 control register (FL2CR). Details for these operations appear later in this
subsection.
The FLASH-2 memory map consists of:
Programming tools are available from Freescale Semiconductor. Contact your local representative for
more information.
2.7.2 FLASH-2 Control and Block Protect Registers
The FLASH-2 array has two registers that control its operation, the FLASH-2 control register (FL2CR) and
the FLASH-2 block protect register (FL2BPR).
2.7.2.1 FLASH-2 Control Register
The FLASH-2 control register (FL2CR) controls FLASH-2 program and erase operations.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
50
unauthorized users.
•
•
•
•
•
$0462–$04FF: user memory (158 bytes)
$0980–$1B7F: user memory (4608 bytes)
$1E20–$7FFF: user memory (25056 bytes)
$FF81: FLASH-2 block protect register (FL2BPR)
$FE08: FLASH-2 control register (FL2CR)
Address:
Reset:
Read:
Write:
FL2BPR physically resides within FLASH-1 memory addressing space
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
A security feature prevents viewing of the FLASH contents.
$FE08
Bit 7
0
0
Figure 2-7. FLASH-2 Control Register (FL2CR)
= Unimplemented
6
0
0
5
0
0
NOTE
NOTE
4
0
0
HVEN
3
0
MASS
2
0
ERASE
1
0
(1)
Freescale Semiconductor
PGM
Bit 0
0
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