MC908AP32CFAER Freescale Semiconductor, MC908AP32CFAER Datasheet - Page 125
MC908AP32CFAER
Manufacturer Part Number
MC908AP32CFAER
Description
IC MCU 32K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908AP8CFBE.pdf
(324 pages)
Specifications of MC908AP32CFAER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, IRSCI, SCI, SPI
Peripherals
LED, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
MC908AP32CFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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8.4 Security
A security feature discourages unauthorized reading of FLASH locations while in monitor mode. The host
can bypass the security feature at monitor mode entry by sending eight security bytes that match the
bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.
During monitor mode entry, the MCU waits after the power-on reset for the host to send the eight security
bytes on pin PTA0. If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code from FLASH. Security remains
bypassed until a power-on reset occurs. If the reset was not a power-on reset, security remains bypassed
and security code entry is not required. (See
Freescale Semiconductor
PTA0
RST
V
NOTES:
Do not leave locations $FFF6–$FFFD blank. For security reasons, program
locations $FFF6–$FFFD even if they are not used for vectors.
DD
1 = Echo delay, 2 bit times.
2 = Data return delay, 2 bit times.
4 = Wait 1 bit time before sending next byte.
Figure 8-7. Stack Pointer at Monitor Mode Entry
FROM HOST
FROM MCU
4096 + 32 ICLK CYCLES
Figure 8-8. Monitor Mode Entry Timing
MC68HC908AP Family Data Sheet, Rev. 4
HIGH BYTE OF PROGRAM COUNTER
LOW BYTE OF PROGRAM COUNTER
HIGH BYTE OF INDEX REGISTER
LOW BYTE OF INDEX REGISTER
CONDITION CODE REGISTER
ACCUMULATOR
Figure
1
256 BUS CYCLES (MINIMUM)
NOTE
4
8-8.)
1
SP
SP + 1
SP + 2
SP + 3
SP + 4
SP + 5
SP + 6
SP + 7
1
2
4
1
Security
125
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