C8051F504-IQ Silicon Laboratories Inc, C8051F504-IQ Datasheet - Page 15

• Manufacturer Part Number: C8051F504-IQ
• Description: IC 8051 MCU 32K FLASH 48-QFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F50xr

Specifications of C8051F504-IQ

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-QFP
• Mfg Application Notes: LIN Bootloader AppNote
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, SMBus (2-Wire/I²C), CAN, LIN, SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 40
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.25 V
• Data Converters: A/D 32x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Processor Series: C8051F5x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 4
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F500DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 32-ch x 12-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1527 - KIT DEV FOR C8051F50X
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1518

C8051F50x/F51x
SFR Definition 23.3. SMB0DAT: SMBus Data ............................................................ 236
SFR Definition 24.1. SCON0: Serial Port 0 Control .................................................... 248
SFR Definition 24.2. SMOD0: Serial Port 0 Control .................................................... 249
SFR Definition 24.3. SBUF0: Serial (UART0) Port Data Buffer .................................. 250
SFR Definition 24.4. SBCON0: UART0 Baud Rate Generator Control ...................... 250
SFR Definition 24.6. SBRLL0: UART0 Baud Rate Generator Reload Low Byte ........ 251
SFR Definition 24.5. SBRLH0: UART0 Baud Rate Generator Reload High Byte ....... 251
SFR Definition 25.1. SPI0CFG: SPI0 Configuration ................................................... 259
SFR Definition 25.2. SPI0CN: SPI0 Control ............................................................... 260
SFR Definition 25.3. SPI0CKR: SPI0 Clock Rate ....................................................... 261
SFR Definition 25.4. SPI0DAT: SPI0 Data ................................................................. 261
SFR Definition 26.1. CKCON: Clock Control .............................................................. 266
SFR Definition 26.2. TCON: Timer Control ................................................................. 271
SFR Definition 26.3. TMOD: Timer Mode ................................................................... 272
SFR Definition 26.4. TL0: Timer 0 Low Byte ............................................................... 273
SFR Definition 26.5. TL1: Timer 1 Low Byte ............................................................... 273
SFR Definition 26.6. TH0: Timer 0 High Byte ............................................................. 274
SFR Definition 26.7. TH1: Timer 1 High Byte ............................................................. 274
SFR Definition 26.8. TMR2CN: Timer 2 Control ......................................................... 278
SFR Definition 26.9. TMR2RLL: Timer 2 Reload Register Low Byte .......................... 279
SFR Definition 26.10. TMR2RLH: Timer 2 Reload Register High Byte ...................... 279
SFR Definition 26.11. TMR2L: Timer 2 Low Byte ....................................................... 280
SFR Definition 26.12. TMR2H Timer 2 High Byte ....................................................... 280
SFR Definition 26.13. TMR3CN: Timer 3 Control ....................................................... 284
SFR Definition 26.14. TMR3RLL: Timer 3 Reload Register Low Byte ........................ 285
SFR Definition 26.15. TMR3RLH: Timer 3 Reload Register High Byte ...................... 285
SFR Definition 26.16. TMR3L: Timer 3 Low Byte ....................................................... 286
SFR Definition 26.17. TMR3H Timer 3 High Byte ....................................................... 286
SFR Definition 27.1. PCA0CN: PCA Control .............................................................. 300
SFR Definition 27.2. PCA0MD: PCA Mode ................................................................ 301
SFR Definition 27.3. PCA0PWM: PCA PWM Configuration ....................................... 302
SFR Definition 27.4. PCA0CPMn: PCA Capture/Compare Mode .............................. 303
SFR Definition 27.5. PCA0L: PCA Counter/Timer Low Byte ...................................... 304
SFR Definition 27.6. PCA0H: PCA Counter/Timer High Byte ..................................... 304
SFR Definition 27.7. PCA0CPLn: PCA Capture Module Low Byte ............................. 305
SFR Definition 27.8. PCA0CPHn: PCA Capture Module High Byte ........................... 305
C2 Register Definition 28.1. C2ADD: C2 Address ...................................................... 306
C2 Register Definition 28.2. DEVICEID: C2 Device ID ............................................... 307
C2 Register Definition 28.3. REVID: C2 Revision ID .................................................. 307
C2 Register Definition 28.4. FPCTL: C2 Flash Programming Control ........................ 308
C2 Register Definition 28.5. FPDAT: C2 Flash Programming Data ............................ 308
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