MC9S12XEG128MAA Freescale Semiconductor, MC9S12XEG128MAA Datasheet - Page 268

• Manufacturer Part Number: MC9S12XEG128MAA
• Description: MCU 16BIT 128K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XEG128MAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 12x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 25
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• No. Of I/o's: 59
• Eeprom Memory Size: 2KB
• Ram Memory Size: 12KB
• Cpu Speed: 50MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 8
• Digital Ic Case Style: QFP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 6 Interrupt (S12XINTV2)
6.1.4
Figure 6-1
6.2
The XINT module has no external signals.
268
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Peripheral
Interrupt Requests
Wake up
XGATE
XGATE
Requests
External Signal Description
(Up to 108 Channels)
shows a block diagram of the XINT module.
One Set Per Channel
Block Diagram
Decoder
Priority
RQST
To XGATE Module
Non I Bit Maskable
Vector
ID
IRQ Channel
Channels
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 6-1. XINT Block Diagram
XGATE
Interrupts
INT_XGPRIO
PRIOLVL2
PRIOLVL1
PRIOLVL0
Interrupt
Requests
RQST
PRIOLVLn
INT_XGPRIO = XGATE Interrupt Priority
IVBR
IPL
= bits from the channel configuration
in the associated configuration register
XGATE Request Route,
Priority Level
= Interrupt Vector Base
= Interrupt Processing Level
Wake Up
CPU
IVBR
Address
Vector
Freescale Semiconductor
New
IPL
Current
IPL