MC9S12XET256CAG Freescale Semiconductor, MC9S12XET256CAG Datasheet - Page 385

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MC9S12XET256CAG

Manufacturer Part Number
MC9S12XET256CAG
Description
MCU 16BIT 256K FLASH 144-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12XET256CAG

Core Processor
HCS12X
Core Size
16-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
119
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LQFP
Processor Series
S12XE
Core
HCS12
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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10.8.1.3
Operands for immediate mode instructions are included in the instruction stream and are fetched into the
instruction queue along with the rest of the 16 bit instruction. The ’#’ symbol is used to indicate an
immediate addressing mode operand. This address mode is used for semaphore instructions.
Examples:
10.8.1.4
The 4 bit wide immediate addressing mode is supported by all shift instructions.
RD = RD ∗ IMM4
Examples:
10.8.1.5
The 8 bit wide immediate addressing mode is supported by four major commands (ADD, SUB, LD, CMP).
RD = RD ∗ imm8
Examples:
10.8.1.6
The 16 bit wide immediate addressing mode is a construct to simplify assembler code. Instructions which
offer this mode are translated into two opcodes using the eight bit wide immediate addressing mode.
RD = RD ∗ IMM16
Examples:
10.8.1.7
In this addressing mode only one operand is explicitly given. This operand can either be the source (f(RD)),
the target (RD = f()), or both source and target of the operation (RD = f(RD)).
Examples:
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
CSEM
SSEM
LSL
LSR
ADDL
SUBL
LDH
CMPL
LDW
ADD
JAL
SIF
Immediate 3-Bit Wide (IMM3)
Immediate 4 Bit Wide (IMM4)
Immediate 8 Bit Wide (IMM8)
Immediate 16 Bit Wide (IMM16)
Monadic Addressing (MON)
#1
#3
R4,#1
R4,#3
R1,#1
R2,#2
R3,#3
R4,#4
R4,#$1234
R4,#$5678
R1
R2
; Unlock semaphore 1
; Lock Semaphore 3
; R4 = R4 << 1; shift register R4 by 1 bit to the left
; R4 = R4 >> 3; shift register R4 by 3 bits to the right
; adds an 8 bit value to register R1
; subtracts an 8 bit value from register R2
; loads an 8 bit immediate into the high byte of Register R3
; compares the low byte of register R4 with an immediate value
; PC = R1, R1 = PC+2
; Trigger IRQ associated with the channel number in R2.L
MC9S12XE-Family Reference Manual Rev. 1.23
; translated to LDL R4,#$34; LDH R4,#$12
; translated to ADDL R4,#$78; ADDH R4,#$56
Chapter 10 XGATE (S12XGATEV3)
385

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