MCF51JM128VLD Freescale Semiconductor, MCF51JM128VLD Datasheet - Page 6

• Manufacturer Part Number: MCF51JM128VLD
• Description: IC MCU 128/16K FLASH/SRAM 44LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51JMr

Specifications of MCF51JM128VLD

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, SCI, SPI, USB OTG
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LQFP
• Processor Series: MCF51JM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 50.33 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 9
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOJM, DEMOFLEXISJMSD, EVB51JM128
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• Package: 44LQFP
• Device Core: ColdFire
• Family Name: MCF51JM
• Maximum Speed: 50.33 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: EVB51JM128 - BOARD EVAL FOR MCF51JM128 MCUDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MCF51JM128 Family Configurations
1.3.1
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32-Bit Version 1 ColdFire® Central Processor Unit (CPU)
— Up to 50.33 MHz at 2.7 V – 5.5 V
— Performance (Dhrystone 2.1):
— Implements Instruction Set Revision C (ISA_C)
— Supports up to 30 peripheral interrupt requests and seven software interrupts
On-chip memory
— Up to 128 KBytes Flash memory with read/program/erase over full operating voltage and temperature range
— Up to 16 KBytes static random access memory (RAM)
— Security circuitry to prevent unauthorized access to RAM and flash contents
Power-saving modes
— Two low-power stop plus wait modes
— Peripheral clock enable register can disable clocks to unused modules, thereby reducing currents; this behavior
— Very lower power real-time counter for use in run, wait, and stop modes with internal and external clock sources
Four Clock Source Options
— Oscillator (XOSC) — Loop-control Pierce oscillator; crystal or ceramic resonator range of 31.25 kHz to 38.4 kHz
— FLL/PLL controlled by internal or external reference
— Trimmable internal reference allows 0.2% resolution and 2% deviation
System protection features
— Watchdog computer operating properly (COP) reset with option to run from dedicated 1 kHz internal clock source
— Low-voltage detection with reset or interrupt; selectable trip points
— Illegal opcode and illegal address detection with programmable reset or exception response
— Flash block protection
Debug support
— Single-wire Background debug interface
— 4 Program Counters plus two address (optional data) breakpoint registers with programmable 1- or 2-level trigger
— 64-entry processor status and debug data trace buffer with programmable start/stop conditions
Universal Serial Bus (USB) On-The-Go dual-role controller
— Full-speed USB device controller
— Full-speed / low-speed host controller
— OTG protocol logic
— On-chip USB transceiver
— On-chip 3.3 V USB regulator and pull-up resistors save system cost
– 0.94 Dhrystone 2.1 MIPS per MHz when running from internal RAM
– 0.76 Dhrystone 2.1 MIPS per MHz when running from flash
allows clocks to remain enabled to specific perhipherals in Stop3 mode
or 1 MHz to 16 MHz
or bus clock
response
– Fully compliant with USB specification 1.1 and 2.0
– 16 bidirectional endpoints, with double buffering to provide the maximum throughput
– Supports control, bulk, interrupt, and isochronous endpoints
– Supports bus-powered capability with low-power consumption
– Host mode allows control, bulk, interrupt, and isochronous transfers
Feature List
MCF51JM128 ColdFire Microcontroller, Rev. 3
Freescale Semiconductor