MCF51JM128VLD Freescale Semiconductor, MCF51JM128VLD Datasheet - Page 7

• Manufacturer Part Number: MCF51JM128VLD
• Description: IC MCU 128/16K FLASH/SRAM 44LQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF51JMr

Specifications of MCF51JM128VLD

• Core Processor: Coldfire V1
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, SCI, SPI, USB OTG
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 44-LQFP
• Processor Series: MCF51JM
• Core: ColdFire V1
• Data Bus Width: 32 bit
• Data Ram Size: 16 KB
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 50.33 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 9
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: DEMOJM, DEMOFLEXISJMSD, EVB51JM128
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 12-bit
• Package: 44LQFP
• Device Core: ColdFire
• Family Name: MCF51JM
• Maximum Speed: 50.33 MHz
• Operating Supply Voltage: 3.3|5 V
• For Use With: EVB51JM128 - BOARD EVAL FOR MCF51JM128 MCUDEMOJMSKT - BOARD DEMO S08JM CARD W/SOCKET
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Freescale Semiconductor
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Controller area network (MSCAN)
— Implementation of the CAN protocol — Version 2.0A/B
— Five receive buffers with FIFO storage scheme
— Three transmit buffers with internal prioritization using a “local priority” concept
— Flexible maskable identifier filter programmable as 2x32-bit, 4x16-bit, or 8x8-bit
— Programmable wakeup functionality with integrated low-pass filter
— Programmable loopback mode supports self-test operation
— Programmable bus-off recovery functionality
— Internal timer for time-stamping of received and transmitted messages
Cryptographic acceleration unit (CAU)
— Co-processor support of DES, 3DES, AES, MD5, and SHA-1
Random number generator accelerator (RNGA)
— 32-bit random number generator that complies with FIPS-140
Analog-to-digital converter (ADC)
— 12-channel, 12-bit resolution
— Output formatted in 12-, 10-, or 8-bit right-justified format
— Single or continuous conversion, and selectable asynchronous hardware conversion trigger
— Operation in Stop3 mode
— Automatic compare function
— Internal temperature sensor
Analog comparators (ACMP)
— Selectable interrupt on rising edge, falling edge, or either rising or falling edges of comparator output
— Option to compare to fixed internal bandgap reference voltage
— Option to route output to TPM module
— Operation in Stop3 mode
Inter-integrated circuit (IIC)
— Up to 100 kbps with maximum bus loading
— Multi-master operation
— Programmable slave address
— Supports broadcast mode and 10-bit address extension
Serial communications interfaces (SCI)
— Two SCIs with full-duplex, non-return-to-zero (NRZ) format
— LIN master extended break generation
— LIN slave extended break detection
— Programmable 8-bit or 9-bit character length
— Wake up on active edge
Serial peripheral interfaces (SPI)
— Two serial peripheral interfaces with full-duplex or single-wire bidirectional
— Double-buffered transmit and receive
— Programmable transmit bit rate, phase, polarity, and Slave Select output
— MSB-first or LSB-first shifting
Timer/pulse width modulator (TPM)
— 16-bit free-running or modulo up/down count operation
— Up to eight channels, where each channel can be an input capture, output compare, or edge-aligned PWM
— One interrupt per channel plus terminal count interrupt
MCF51JM128 ColdFire Microcontroller, Rev. 3
MCF51JM128 Family Configurations
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