R5F21256SNFP#ES Renesas Electronics America, R5F21256SNFP#ES Datasheet - Page 366

• Manufacturer Part Number: R5F21256SNFP#ES
• Description: MCU 2/5V 32K 52-LQFP ES SAMPLE
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/25r

Specifications of R5F21256SNFP#ES

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 52-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/24 Group, R8C/25 Group
Rev.3.00
REJ09B0244-0300
Figure 16.32
16.3.3
(1) I
(2) I
Explanation of symbols
S
SLA
R/W
A
DATA : Transmit / receive data
P
16.3.3.1
(a) I
(b) I
2
2
C bus format
C bus timing
Setting the FS bit in the SAR register to 0 enables communication in I
Figure 16.32 shows the I
8 bits.
: Start condition
: Slave address
: Indicates the direction of data transmit/receive
2
2
: Acknowledge
: Stop condition
The master device changes the SDA signal from “H” to “L” while the SCL signal is held “H”.
Data is transmitted from the slave device to the master device when R/W value is 1 and from the master device to the slave device when
R/W value is 0.
C bus format (FS = 0)
C bus format (when start condition is retransmitted, FS = 0)
The receive device sets the SDA signal to “L”.
The master device changes the SDA signal from “L” to “H” while the SCL signal is held “H”.
SDA
SCL
Feb 29, 2008
S
S
1
1
I
2
C bus Interface Mode
S
I
I
2
2
C bus Format and Bus Timing
C bus Format
SLA
SLA
7
7
1 to 7
SLA
1
1
Page 347 of 485
R/W
R/W
8
1
1
R/W
2
C bus Format and Bus Timing. The 1st frame following the start condition consists of
A
A
1
1
9
A
DATA
DATA
n
n1
1 to 7
m1
DATA
8
A
1
m
A/A
1
9
A
S
1
A/A
1 to 7
1
SLA
7
P
1
DATA
1
2
Transfer bit count (n = 1 to 8)
Transfer frame count (m = from 1)
8
16. Clock Synchronous Serial Interface
C bus format.
R/W
1
9
A
Upper: Transfer bit count (n1, n2 = 1 to 8)
Lower: Transfer frame count (m1, m2 = 1 or more)
A
1
P
DATA
n2
m2
A/A
1
P
1