M38588GCSP#U0 Renesas Electronics America, M38588GCSP#U0 Datasheet - Page 74

• Manufacturer Part Number: M38588GCSP#U0
• Description: IC 740/3858 MCU QZ-ROM 42DIP
• Manufacturer: Renesas Electronics America
• Series: 740/38000r

Specifications of M38588GCSP#U0

• Core Processor: 740
• Core Size: 8-Bit
• Speed: 12.5MHz
• Connectivity: SIO, UART/USART
• Peripherals: PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: QzROM
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 9x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 42-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

3858 Group
Notes on A/D Converter
1. Analog input pin
Make the signal source impedance for analog input low, or equip
an analog input pin with an external capacitor of 0.01 F to 1 F.
Further, be sure to verify the operation of application products on
the user side.
<Reason>
An analog input pin includes the capacitor for analog voltage com-
parison. Accordingly, when signals from signal source with high
impedance are input to an analog input pin, charge and discharge
noise generates. This may cause the A/D conversion precision to
be worse.
2. A/D converter power source pin
The AV
using the A/D conversion function or not, connect it as following :
•AV
<Reason>
If the AV
because of noise or others.
3. Clock frequency during A/D conversion
The comparator consists of a capacity coupling, and a charge of
the capacity will be lost if the clock frequency is too low. Thus,
make sure the following during an A/D conversion.
• f(X
• Do not execute the STP instruction.
• When the A/D converter is operated at low-speed mode, f(X
Notes on Watchdog Timer
• Make sure that the watchdog timer does not underflow while
• When the STP instruction function selection bit has been set to
Notes on RESET Pin
1. Connecting capacitor
In case where the RESET signal rise time is long, connect a ce-
ramic capacitor or others across the RESET pin and the V
Use a 1000 pF or more capacitor for high frequency use. When
connecting the capacitor, note the following :
• Make the length of the wiring which is connected to a capacitor
• Be sure to verify the operation of application products on the
<Reason>
If the several nanosecond or several ten nanosecond impulse
noise enters the RESET pin, it may cause a microcomputer failure.
2. Reset release after power on
When releasing the reset after power on, such as power-on reset,
release reset after X
where the power supply voltage is 2.7 V or more and the X
cillation is stable.
<Reason>
To release reset, the RESET pin must be held at an “L” level for 20
cycles or more of X
is between 2.7 V and 5.5 V, and X
REJ03B0139-0111
page 72 of 73
do not have the lower limit of frequency, because of the A/D con-
verter has a built-in self-oscillation circuit.
waiting Stop release, because the watchdog timer keeps count-
ing during that term.
“1”, it is impossible to switch it to “0” by a program.
as short as possible.
user side.
SS
IN
) is 500 kHz or more in middle-/high-speed mode.
: Connect to the V
SS
SS
pin is A/D converter power source pin. Regardless of
pin is opened, the microcomputer may have a failure
____________
____________
____________
IN
____________
IN
in the state where the power source voltage
Rev.1.11
passes more than 20 cycles in the state
SS
line
IN
Dec 18, 2008
oscillation is stable.
____________
SS
IN
pin.
os-
IN
)
Notes on Using Stop Mode
1. Register setting
Since values of the prescaler 12 and Timer 1 are automatically re-
loaded when returning from the stop mode, set them again,
respectively. (When the oscillation stabilizing time set after STP in-
struction released bit is “0”)
When using the oscillation stabilizing time set after STP instruction
released bit set to “1”, evaluate time to stabilize oscillation of the
used oscillator and set the value to the timer 1 and prescaler 12.
2. Clock restoration
After restoration from the stop mode to the normal mode by an in-
terrupt request, the contents of the CPU mode register previous to
the STP instruction execution are retained. Accordingly, if both
main clock and sub clock were oscillating before execution of the
STP instruction, the oscillation of both clocks is resumed at resto-
ration.
In the above case, when the main clock side is set as a system
clock, the oscillation stabilizing time for approximately 8,000
cycles of the X
mode. At this time, note that the oscillation on the sub clock side
may not be stabilized even after the lapse of the oscillation stabi-
lizing time of the main clock side.
Notes on Wait Mode
• Clock restoration
If the wait mode is released by a reset when X
system clock and X
WIT instruction, X
X
In the above case, the RESET pin should be held at “L” until the
oscillation is stabilized.
Notes on Restarting Oscillation
• Restarting oscillation
Usually, when the MCU stops the clock oscillation by STP instruc-
tion and the STP instruction has been released by an external
interrupt source, the fixed values of Timer 1 and Prescaler 12
(Timer 1 = “01
loaded in order for the oscillation to stabilize.
The user can inhibit the automatic setting by writing “1” to bit 0 of
MISRG (address 0038
However, by setting this bit to “1”, the previous values, set just be-
fore the STP instruction was executed, will remain in Timer 1 and
Prescaler 12. Therefore, you will need to set an appropriate value
to each register, in accordance with the oscillation stabilizing time,
before executing the STP instruction.
<Reason>
Oscillation will restart when an external interrupt is received.
However, internal clock
1 starts to underflow. This ensures time for the clock oscillation us-
ing the ceramic resonators to be stabilized.
IN
is set as the system clock.
16
IN
”, Prescaler 12 = “FF
CIN
input is reserved at restoration from the stop
IN
oscillation is stopped during execution of the
oscillation stops, X
16
).
is supplied to the CPU only when Timer
16
IN
”) are automatically re-
oscillations starts, and
CIN
is set as the