MC9S12C128CPBE Freescale Semiconductor, MC9S12C128CPBE Datasheet - Page 463

• Manufacturer Part Number: MC9S12C128CPBE
• Description: IC MCU 128K FLASH 25MHZ 52-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12C128CPBE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Chapter 16
Dual Output Voltage Regulator (VREG3V3V2)
Block Description
16.1
The VREG3V3V2 is a dual output voltage regulator providing two separate 2.5 V (typical) supplies
differing in the amount of current that can be sourced. The regulator input voltage range is from 3.3 V up
to 5 V (typical).
16.1.1
The block VREG3V3V2 includes these distinctive features:
16.1.2
There are three modes VREG3V3V2 can operate in:
Freescale Semiconductor
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Two parallel, linear voltage regulators
— Bandgap reference
Low-voltage detect (LVD) with low-voltage interrupt (LVI)
Power-on reset (POR)
Low-voltage reset (LVR)
Full-performance mode (FPM) (MCU is not in stop mode)
The regulator is active, providing the nominal supply voltage of 2.5 V with full current sourcing
capability at both outputs. Features LVD (low-voltage detect), LVR (low-voltage reset), and POR
(power-on reset) are available.
Reduced-power mode (RPM) (MCU is in stop mode)
The purpose is to reduce power consumption of the device. The output voltage may degrade to a
lower value than in full-performance mode, additionally the current sourcing capability is
substantially reduced. Only the POR is available in this mode, LVD and LVR are disabled.
Shutdown mode
Controlled by V
This mode is characterized by minimum power consumption. The regulator outputs are in a high
impedance state, only the POR feature is available, LVD and LVR are disabled.
This mode must be used to disable the chip internal regulator VREG3V3V2, i.e., to bypass the
VREG3V3V2 to use external supplies.
Introduction
Features
Modes of Operation
REGEN
(see device overview chapter for connectivity of V
MC9S12C-Family / MC9S12GC-Family
Rev 01.24
REGEN
).
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