M30262F8GP#U9 Renesas Electronics America, M30262F8GP#U9 Datasheet - Page 110
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M30262F8GP#U9
Manufacturer Part Number
M30262F8GP#U9
Description
IC M16C/TINY MCU FLASH 48LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/Tiny/26r
Datasheets
1.M30622SAFPU5.pdf
(308 pages)
2.M30262F4GPU3.pdf
(41 pages)
3.M30262F4GPU3.pdf
(241 pages)
Specifications of M30262F8GP#U9
Core Processor
M16C/60
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IEBus, SIO, UART/USART
Peripherals
DMA, WDT
Number Of I /o
38
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M30262F8GP#U9M30262F8GP#D3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30262F8GP#U9M30262F8GP#D5
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
M30262F8GP#U9M30262F8GP#U3
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Three-Phase Motor Control Timer Function
102
Triangular wave modulation
To generate a PWM waveform of triangular wave modulation, set “0” in the modulation mode select bit
(bit 6 at 0348
of timers A4, A1, and A2 has two timer registers, and alternately reloads the timer register’s content to the
counter every time timer B2 counter’s content becomes 0000
output specification bit (bit 1 at 0348
timer B2 counter’s value becomes 0000
the frequency of interrupt occurrences. The frequency of occurrences is given by (setting; setting • 0).
Setting “1” in the effective interrupt output specification bit (bit 1 at 0348
which value of the timer A1 reload control signal to use, “0” or “1”, to cause timer B2’s interrupt request to
occur. To make this selection, use the effective interrupt output polarity selection bit (bit 0 at 0348
An example of U phase waveform is shown in Figure 1.14.8, and the description of waveform output
workings is given below. Set “1” in DU0 (bit 0 at 034A
addition, set “0” in DU1 (bit 0 at 034B
interrupt output specification bit (bit 1 at 0348
frequency set counter. By this setting, a timer B2 interrupt occurs when the timer B2 counter’s content
becomes 0000
fication bit (bit 1 at 0348
set "1" in the interrupt occurrence frequency set counter (034D
interrupt to occur every other interval when the U phase output goes to “H”.
When the timer B2 counter’s content becomes 0000
this instance, the content of DU1 (bit 0 at 034B
phase output shift register (U phase), the content of DUB1 (bit 1 at 034B
034A
mode is selected, however, no setting is made in the shift register even though the timer B2 counter’s
content becomes 0000
The value of DU0 and that of DUB0 are output to the U terminal (P8
respectively. When the timer A4 counter counts the value written to timer A4 (038F
timer A4 finishes outputting one-shot pulses, the three-phase shift register’s content is shifted one posi-
tion, and the value of DU1 and that of DUB1 are output to the U phase output signal and to U phase
output signal respectively. At this time, one-shot pulses are output from the timer for setting dead time
used for setting the time over which the “L” level of the U phase waveform does not lap over the “L” level
of the U phase waveform, which has the opposite phase of the former. The U phase waveform output that
started from the “H” level keeps its level until the timer for setting dead time finishes outputting one-shot
pulses even though the three-phase output shift register’s content changes from “1” to “0” by the effect of
the one-shot pulses. When the timer for setting dead time finishes outputting one-shot pulses, “0” already
shifted in the three-phase shift register goes effective, and the U phase waveform changes to the “L”
level. When the timer B2 counter’s content becomes 0000
value written to timer A4-1 (0347
ishes outputting one-shot pulses, the three-phase shift register’s content is shifted one position, but if the
three-phase output shift register’s content changes from “0” to “1” as a result of the shift, the output level
changes from “L” to “H” without waiting for the timer for setting dead time to finish outputting one-shot
pulses. A U phase waveform is generated by these workings repeatedly. With the exception that the
three-phase output shift register on the U phase side is used, the workings in generating a U phase
16
) are set in the three-phase output shift register (U phase). After triangular wave modulation
Preliminary Specifications Rev. 0.9
Specifications in this manual are tentative and subject to change.
16
). Also, set “1” in the timers A4-1, A1-1, A2-1 control bit (bit 1 at 0349
16
as many as (setting) times. Furthermore, set “1” in the effective interrupt output speci-
16
16
.
), set “0” in the effective interrupt output polarity select bit (bit 0 at 0348
16
, 0346
Renesas Technology Corp.
16
16
) and set “1” in DUB1 (bit 1 at 034B
), the frequency of interrupt requests that occur every time the
16
16
can be set by use of the timer B2 counter (034D
), and starts outputting one-shot pulses. When timer A4 fin-
16
16
) and that of DU0 (bit 0 at 034A
) to set a value in the timer B2 interrupt occurrence
16
, timer A4 starts outputting one-shot pulses. In
16
). And set “0” in DUB0 (bit 1 at 034A
16
, the timer A4 counter starts counting the
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
. If “0” is set to the effective interrupt
16
). These settings cause a timer B2
16
) provides the means to choose
0
16
) and to the U terminal (P8
16
). Also, set “0” in the effective
) and that of DUB0 (bit 1 at
16
16
16
) are set in the three-
). In this mode, each
, 038E
M16C/26 Group
16
16
) for setting
) and when
16
16
16
) and
). In
).
1
)